Asymmetrical Cascaded Multilevel Inverter Research Articles

Fault Diagnosis of Asymmetric Cascaded Multilevel Inverter using Ensemble Machine Learning

Fault Diagnosis of Asymmetric Cascaded Multilevel Inverter using Ensemble Machine Learning

Direct ADC Controlled Asymmetric Cascaded Multilevel Inverter

This paper presents an asymmetric multi-level inverter with a novel direct ADC control scheme. This scheme does not use a carrier wave or a reference sinusoidal wave to generate gate pulses for power switches, but an Analog to Digital Converter (ADC) to create gate pulses. For n sources, n bit ADC will generate 2n+1-1 levels at the output voltage of the inverter. This scheme uses the ADC output for the gate pulses for power switching devices. In this topology, the inverter comprises a series of connected half-bridges to generate a more significant level. The presented topology uses binary level supply voltages. Different topologies with different parameters are compared with the proposed inverter, and the operation of the proposed control scheme is verified with a simulation in Matlab. The prototype of a 31-level inverter is developed in hardware, and the hardware results are discussed.

Performance Enhancement of a Three Phase Boost-Cascaded Fifteen Level Inverter Using the PI Controller

Photovoltaic power generation is a potential alternative energy source that offers several benefits over other alternative energy sources such as wind, sun, ocean, biomass, geothermal, and so on. Multilevel inverters are essential for power conversion in solar power generation. These multilevel inverters employ three distinct topologies: diode-clamped (neutral-point clamped) inverter, capacitor-clamped (flying capacitor) inverter, and cascaded H-bridge multilevel inverter. The cascaded H-bridge multilevel inverter is more appropriate for photovoltaic applications than the other two topologies. The proposed system asymmetrical cascaded multilevel inverter (ACMLI) is energized using a photovoltaic system (PV). A three-phase cascaded H-bridge fifteen-level inverter for grid-connected solar systems is given in this study utilizing a proportional integral controller. The harmonic distortion was removed using a multicarrier pulse width modulation method. The MATLAB/Simulink is used to simulate the performance of a three-phase cascaded H-bridge fifteen-level inverter in terms of harmonic content and number of switches. To test the performance of the designed system, a hardware prototype was created. From the obtained results, the proposed method reduces the switch count, harmonic distortion, and rejects the external disturbances of input and output variables.

Design and Implementation of Asymmetric Cascaded Multilevel Inverter with Optimal Components

A novel asymmetrical cascaded one-twenty-five level multilevel inverter is proposed with optimal components. The proposed inverter consists of three sub-cells connected asymmetrical configuration to generate a 125-level output voltage. The sub-cell comprises six power switches and two DC sources to produce five output voltage levels with symmetrical configuration. This paper presents the five, twenty-five, one-twenty five-level inverters with optimal components with very lower harmonics. The results of the proposed inverters are experimentally tested with linear and non-linear loads. During dynamic circumstances, the suggested inverters are extremely stable. The proposed inverters will generate a greater voltage level with nominal harmonics as per IEEE standards. A complete comparison is made with previously published similar MLIs with proposed twenty-five MLI. The Proposed MLI has several merits such as cost factor, optimal components, THD, and TSV. The proposed five, twenty-five, and one-twenty-five level inverters are experimentally implemented with the help of the dSPACE RTI1104 controller. The proposed inverters are well suited for grid-connected and renewable applications.

Asymmetric cascade multilevel inverter with self‐balanced switched‐capacitor unit and single source

The technique of single-source cascaded H-bridge multilevel inverter (MLI) has been reported in previous works. In this study, a self-balanced series/parallel switched-capacitor (SC) is introduced to further develop this type of MLIs to generate more output levels. Each cascaded H-bridge is fed by an SC unit. All components in each SC unit withstand the same voltage stress, but different SC units address different voltages. With this asymmetric feature, different H-bridges are responsible for providing levels with different voltage intervals so that the cascaded MLI can generate numerous levels with a single dc source and fewer components. Compared with the conventional asymmetrical cascaded MLIs, just a single dc source is required, capacitors’ voltages are balanced automatically, high boosting ability and more output levels are achieved with SC technique in the proposed MLIs. To synthesise the output voltage as close as possible to sinusoidal shape but with less switching loss, comparative analysis of nearest level control and equal area criterion is provided to modulate the proposed MLI with 13-level output. Experimental results demonstrate that the proposed MLI has high efficiency and low harmonics.

Performance comparison between optimization algorithms for asymmetrical cascaded multilevel inverter control

This paper discusses the hardware and control system design of the asymmetric cascade multilevel inverter. The asymmetric cascaded multilevel inverter structure is adopted to minimize bridges, gate drive circuits and DC power source number. Therefore, the proposed structure is able to generate higher voltage at higher speed with low switching losses and high efficiency. Selective Harmonic Elimination (SHE) based on Newton-Raphson (N-R) algorithm is developed to calculate a switching angle for a range of modulation index to control asymmetric cascade multilevel inverter. Simulation results prove that Newton-Raphson technique is more effective than genetic algorithm (G-A) and equal calculated switching angles method (ECSA). A comparison between the algorithm performance for 9-level asymmetric cascade H-bridge inverter control was evaluated and experimentally tested on FPGA-based prototypes

Operation and Control of a Grid-Connected Asymmetrical Cascaded Multilevel Inverter

This article presented a new structure for the grid-connected multilevel inverters (MLIs) circuit with the ability of the cascaded connection. The proposed inverter is capable of transformerless connection of distributed generation resources to the network. The control system manages the power injection to the grid by minimizing the output current harmonics as well as exchanging reactive power with the grid. The self-balancing state of the capacitors' voltage is occurred only with the switching technique without any measurement sensors. An enhanced phase-locked loop (EPLL) and a proportional resonant (PR) controller are employed for the proposed asymmetric MLI. An important feature of the proposed inverter is the ability of stable performance and fast dynamics of the control system to the changes of the reference values. Simulation and experimental results are presented in order to validate the performance accuracy of the proposed MLI.

Modular multilevel inverter for renewable energy applications

<p>This paper proposes a Multilevel Inverter (MLI) which focuses on two objective , minimal voltage sources and lesser switching component. The proposed Asymmetrical Cascaded Multilevel Inverter (ACMLI) is able to achieve the objective by selectively opting the voltage level of DC sources chosen and implementing the mathematical operation of addition and subtraction on the DC sources. This system also utilizes multiple carrier sinusoidal pulse width modulation technique (MCS-PWM) for operating the switches. It is found that the number of switches required for proposed modular bridge ACMLI and modified H bridge ACMLI was lesser than the traditional Cascaded H bridge Multilevel Inverter (CHB-MLI). It is also evident that the number of DC voltage sources and filter required for smoothing the output waveform is reduced compared to the traditional MLI. The Total Harmonic Distortion (THD) for the proposed circuit was simulated and analyzed in MATLAB Simulink environment and the results are found to be very less and satisfactory. The proposed circuit can find its application in integrating Renewable Energy Sources (RES) to the utility grid, Electrical Vehicle (EV) , harmonic reduction and so on. The simulation results of the proposed circuits are tabulated and compared with the traditional cascaded MLI.</p>

Design of New Asymmetrical Cascaded Multilevel Inverter with Reduced Number of Switches

Design of New Asymmetrical Cascaded Multilevel Inverter with Reduced Number of Switches

Hybrid Asymmetric Cascaded Multilevel Inverters Based on Three- and Nine-Level H-Bridges

This paper proposes two hybrid asymmetric cascaded multilevel inverters for driving medium-voltage open-end winding motors. Each phase of the proposed systems consist of a three-level (3L) H-bridge cell and a nine-level (9L) H-bridge cell connected in series. An unequal dc-voltage ratio of 1:8 between cells is used, providing 19 phase voltage levels. The topologies of the 9L H-bridge cell are based on modular multilevel cascade converter (MMCC) with double-star chopper cells, while the 3L H-bridge cell is fed by a floating capacitor. Compared to conventional MMCC for open-end stator winding motor drives, the proposed inverters can produce more phase voltage levels. In addition, they require a smaller number of power semiconductor switches, drivers and capacitors. Simulations and experimental results are presented in order to demonstrate the performance and feasibility of the proposed topologies.

New level doubling architecture of cascaded multilevel inverter

This study presents a new topology of single-phase cascaded multilevel inverter (CMLI). The proposed topology offers an optimised DC source utilisation, reduced switch count and curtailment of active switches in the conduction path for minimising power losses. It can produce almost twice the number of output voltage steps in comparison to the cascaded H-bridge, hence named level-doubling architecture, and can be operated as both symmetric and asymmetric CMLIs. Identical modules of proposed CMLI precludes requirement of a variety of semiconductors and provides ease for spare management. The modular design also facilitates mass production and enhances system reliability. Furthermore, the proposed topology can be easily extended to high-voltage applications. The proposed design is tested for its practicability by simulations in MATLAB/Simulink and results are verified by experimental set up of a scaled prototype single-phase model.

An Efficient Single-Sourced Asymmetrical Cascaded Multilevel Inverter With Reduced Leakage Current Suitable for Single-Stage PV Systems

An isolated single sourced multi-output dc/dc converter with a high-frequency link was proposed before to feed different cells of the Asymmetrical Cascaded H-bridge (ACHB) inverter. One of the fundamental advantages of the ACHB is that the main H-bridge is commutated with fundamental frequency, passing the majority of the inverter power. However, the isolated dc/dc converter needs to be connected to the main voltage source with high-voltage/high-frequency switches, which limits the power capability and the efficiency of the converter. In this paper, a switching pattern based on nearest level modulation method is proposed to command all the power to be transferred through the main H-bridge. Therefore, the power circulates between the auxiliary H-bridges with no need for high-voltage switches. As a result, a single-input single-output auxiliary converter is needed with only 5% of the power rating. This solution reduces cost and size while it improves the efficiency of the converter. Furthermore, the architecture makes the inverter more suitable for high power and high-voltage applications. The inverter switching strategy is based on programmable firing angles. The main dc-link of the grid connected inverter is controlled to achieve maximum power point tracking, while the dc/dc isolated converter is controlled to regulate the auxiliary dc-links. The proposed topology is verified by simulation and experimental results using a 1.5 kW hardware prototype.

Stability Analysis for the Grid-Connected Single-Phase Asymmetrical Cascaded Multilevel Inverter With SRF-PI Current Control Under Weak Grid Conditions

This paper analyzes the influence of phase-locked loop (PLL) on the stability of LCL -type single-phase grid-connected asymmetrical cascaded H-bridge multilevel inverter (ACHMI) with synchronous reference frame proportional-integral (SRF-PI) grid current control under weak grid scenarios. The ACHMI system is composed of power stage circuit and control system, where the control system contains the dual-loop current control strategy established in the hybrid reference frame, the SRF-PLL, and the hybrid modulation method employed to synthesize the multilevel output voltage. The small-signal model of the whole ACHMI system is first established by using a simple step-by-step derivation method, and then, the small-signal analysis method is adopted to linearize the ACHMI, which is then utilized to derive the impedance model of the ACHMI system. Furthermore, an improved impedance stability criterion is derived, which is then employed to analyze the system stability. By using this criterion, the stability of the ACHMI can be evaluated with the variation of the bandwidth of PLL, the output power factor angle of the ACHMI, and the amplitude of the grid current reference signal under weak grid conditions. In this paper, a systematic design procedure for the optimal selection of the PI controller of the PLL is presented, which guarantees the steady-state performance and dynamic response of the ACHMI system. With this design method, the dual-loop current control and PLL can be taken into account simultaneously when analyzing the stability margin of the ACHMI. Finally, the simulation and experimental results from a down-scaled grid-connected ACHMI prototype system are provided to confirm the validity of theoretical analysis.

Reconfigurable Selective Harmonic Elimination Technique for Wide Range Operations in Asymmetric Cascaded Multilevel Inverter

Reconfigurable Selective Harmonic Elimination Technique for Wide Range Operations in Asymmetric Cascaded Multilevel Inverter

A comparative Analysis of Symmetrical and Asymmetrical Cascaded Multilevel Inverter Having Reduced Number of Switches and DC Sources

<p>As multilevel inverters are gaining increasing importance .New topologies are being proposed in order to achieve large number of levels in output voltage. A simplified MLI topology has been presented with both symmetrical and asymmetrical configurations. This paper represents a comprehensive analysis of above mentioned topology with FFT analysis,switching and conduction losses of the inverter.Hence efficiency at different carrier frequencies has been calculated successfully.Results are verified with simulation studies.Multilevel inverters are currently considered as a better industrial solution for high dynamic performance and power-quality demanding applications, covering a wide power range.</p>

A Flyback-Assisted Single-Sourced Photovoltaic Power Conditioning System Using an Asymmetric Cascaded Multilevel Inverter

This paper proposes a power conditioning system (PCS) for distributed photovoltaic (PV) applications using an asymmetric cascaded multilevel inverter with a single PV source. One of the main disadvantages of the cascaded multilevel inverters in PV systems is the requirement of multiple isolated DC sources. Using multiple PV strings leads to a compromise in either the voltage balance of individual H-bridge cells or the maximum power point tracking (MPPT) operation due to localized variations in atmospheric conditions. The proposed PCS uses a single PV source with a flyback DC-DC converter to facilitate a reduction of the required DC sources and to maintain the voltage balance during MPPT operation. The flyback converter is used to provide input for low-voltage H-bridge cells which processes only 20% of the total power. This helps to minimize the losses occurring in the proposed PCS. Furthermore, transient analyses and controller design for the proposed PCS in both the stand-alone mode and the grid-connection mode are presented. The feasibility of the proposed PCS and its control scheme have been tested using a 1㎾ hardware prototype and the obtained results are presented.

Analysis of Minimum Modulation for the 9-Level Multilevel Inverter in Asymmetric Structure

The main function of multilevel inverters is to synthesize a desired AC voltage output starting from several input levels of direct current voltage. There are several circuit topologies and modulation strategies to generate the desired output voltage of an inverter, among which stands out the traditional Sine Pulse Width Modulation (SPWM) technique with several variants. Phase Disposition (PD), Phase Opposition Disposition (POD) and, Alternate Phase Opposition Disposition (APOD); are presented considering switching frequencies, the spectrum of the output waveform of the inverter, and total harmonic distortion. In this paper, the SPWM techniques are studied due to its easy implementation and for being the most widely used family of multilevel converters, applied to the 9-level Asymmetrical Cascaded Multilevel Inverter (ACMLI) with the trinary structure, which is not a traditional case by means of a simulation environment.

Selective Harmonic Elimination in Asymmetric Cascaded Multilevel Inverters Using a New Low-frequency Strategy for Photovoltaic Applications

Asymmetric multilevel inverters with a main and auxiliary power circuit can yield maximum number of voltage levels against the number of semiconductor devices. Most of the output power will be produced by the main inverter, which works at low frequency and the auxiliary inverters only improve the voltage quality. Advantages of the asymmetric structure are reduced number of semiconductors and gate drive circuits and better voltage quality and efficiency, which make the asymmetric inverter to be a perfect candidate for photovoltaic applications. This article presents a new switching strategy in asymmetric multilevel inverters, which exploits extra degrees of freedom to eliminate more low-order harmonics. Simulation results show this method can introduce two new switching angles without affecting the power losses of the inverter.

A Comparative Analysis of THD Simulation in an Asymmetric Cascaded Multilevel Inverter

When a multilevel inverter has to be operated, question raises on which modulation strategy to choose in order to have lower harmonic content in the output voltage waveform. Multilevel inverters have been a subject of great interest in the field of power electronics because they present a set of properties that make them more efficient than conventional ones. The purpose of this paper is to verify and compare through simulation the output voltage total harmonic distortion and weighted total harmonic distortion employing low and high frequency and hybrid modulation techniques in an asymmetric cascaded multilevel inverter, using binary DC bus voltage progression. All modulation strategies mentioned before were analyzed in the asymmetric multilevel inverter to verify which one is the most suitable for this type of structure using the two most powerful simulation software in power electronics field, such as PSIM and Matlab-Simulink.

Analysis and Experimentation of a Three Phase Asymmetric Cascaded Multilevel Inverter for Electric Vehicles

Multilevel inverters have been gaining immense popularity in high power applications such as Electric vehicles, Flexible AC Transmission Systems etc. This paper focuses on an asymmetric cascaded multilevel inverter employing the variable frequency carrier phase shifted PWM technique. The major advantage of this strategy is that it aids in balancing the switch utilization. The proposed strategy was found to have lower THD and switching losses when compared to the conventional strategies. The simulation was performed using MATLAB/Simulink and the results were verified experimentally.