Architecture Analysis & Design Language Research Articles

Easing the tuning of drone autopilots through a model-based framework

Off-the-shelf open-source autopilots are customized by practitioners to satisfy their customer’s specific needs. When custom functions require low delays and/or fast frequency, in the order of magnitude of hundreds or a couple of thousand hertz, they may impact the behavior of the underlying stabilization loop. This paper proposes a tool chain able to extract a model using a Domain-Specific Language (DSL) based on AADL (Architecture Analysis & Design Language) semantics, extended with specific needs to capture the internal behavior of autopilots. This extraction is done directly during the compilation process of the autopilot. Then, we apply on the model of an autopilot a tool to assign offsets for offset-free systems.

An Environment for Developing Simulatable AADL-DEVS Models

Reducing complexity in system architecture and design specifications, and more specifically from the software aspect, is essential. The architecture specifications focus on what the requirements and static aspects of systems are. The design specifications define dynamic aspects of computational components that sense and react to external stimuli. As the architecture and design specifications serve complementary roles in developing systems, the use of Architecture Analysis & Design Language (AADL) and Discrete Event System Specification (DEVS) is proposed for developing, in a step-wise fashion, combined architecture and design models. The proposed AADL-DEVS framework is grounded in the foundational modularity and hierarchy principles common to the AADL and DEVS modeling approaches. A realization of this framework capable of transforming and simulating the AADL-DEVS specifications is developed using the Open Source AADL Tool Environment (OSATE) and DEVS-Suite simulator. The scope of this paper is on the computational aspect of systems. The proposed AADL-DEVS framework is demonstrated using a model for the software part of an infant incubator, a time-sensitive and safety–critical system.

The FORA Fog Computing Platform for Industrial IoT

Industry 4.0 will only become a reality through the convergence of Operational and Information Technologies (OT & IT), which use different computation and communication technologies. Cloud Computing cannot be used for OT involving industrial applications, since it cannot guarantee stringent non-functional requirements, e.g., dependability, trustworthiness and timeliness. Instead, a new computing paradigm, called Fog Computing, is envisioned as an architectural means to realize the IT/OT convergence. In this paper we propose a Fog Computing Platform (FCP) reference architecture targeting Industrial IoT applications. The FCP is based on: deterministic virtualization that reduces the effort required for safety and security assurance; middleware for supporting both critical control and dynamic Fog applications; deterministic networking and interoperability, using open standards such as IEEE 802.1 Time-Sensitive Networking (TSN) and OPC Unified Architecture (OPC UA); mechanisms for resource management and orchestration; and services for security, fault tolerance and distributed machine learning. We propose a methodology for the definition and the evaluation of the reference architecture. We use the Architecture Analysis Design Language (AADL) to model the FCP reference architecture, and a set of industrial use cases to evaluate its suitability for the Industrial IoT area.

A Cloud-Based Platform for Big Data-Driven CPS Modeling of Robots

This paper proposes an improved cyber-physical systems (CPS) architecture for a smart robotic factory based on an industrial cloud platform driven by big data based on the traditional CPS architecture. This paper uses the architecture analysis and design language to model and design a total of three scales for the underlying cell-level robot, the system-level robot shop, and the overall robotic smart factory CPS, respectively, to complete the conceptual scheme for building a robotic smart factory from a local to an overall CPS system. Using the advantages of cloud computing and combining robotic CPS with cloud computing, an architecture for an industrial management system for CPS cloud computing is proposed. Base based distributed storage architecture with Storm based distributed real-time processing architecture. In terms of modeling, the advantages and disadvantages of using AADL, structural analysis, and design language, and modelers, a physical device modeling language, are combined to analyze the advantages and disadvantages of architecture analysis & design language (AADL) for modeling CPS and propose a CPS analysis and design based on AADL and applicable to it. The paper also investigates the use of LeNet models for state identification in the HSV color space. The algorithm was verified on a self-built power equipment indicator dataset with a 100% detection rate and 99.8% state recognition accuracy after four consecutive frames of fusion detection. Simulink simulation of the trolley was carried out in terms of a cell-level robotic trolley CPS system to demonstrate the effectiveness of the design of a robotic CPS system driven by soaring data based on the industrial cloud platform proposed in this paper.

Hybrid Modeling and Model Transformation of AADL for Verifying the Properties of CPS Space-Time Compositions

The wide application of Cyber Physical System (CPS) makes the security of CPS more and more concerned. As the key factors affecting the safety of CPS, space and time have also become the current research hotspot. The space and time safety of CPS requires that CPS arrives at the specified place at the specified time, time and space should meet the safety requirements of the CPS in the current CPS environment. We call the behavior space-time compositions. In order to solve the problem that CPS lacks the method of modeling and verification of space-time compositions, a hybrid Architecture Analysis & Design Language (AADL) modeling and model transformation method for CPS space-time compositions verification is proposed. Firstly, space-time description capability is extended in the AADL behavior annex and Hybrid AADL (HAADL) is proposed. Secondly, differential equations and space-time compositions vector are introduced in Process Algebra to propose Hybrid Space-Time Communication Sequential Processes (HS-TCSP). Furthermore, the Hybrid AADL is transformed to HS-TCSP. Finally, an example of an aircraft collision avoidance system is used to verify the effectiveness of the method.

Modelling protocol gateways for cyber-physical systems using Architecture Analysis & Design Language

Developing, configuring, and deploying legacy protocol gateways for existing cyber-physical systems to improve interoperability remains challenging. A possible solution is using model-driven engineering languages such as the Architecture Analysis & Design Language (AADL) that enables combined modelling of software, hardware, and communication for distributed systems. Experiences made while creating an OPC Unified Architecture (OPC UA) / Data Distribution Service (DDS) gateway indicate the suitability of AADL to model complex software artefacts. Moreover, a proposed process reduces the development and configuration effort for platform-specific gateway instances. A challenge to be addressed is the generation of executable code for resource-constraint devices.

A Modeling Method for Integrated Modular Avionics Dynamic Reconfiguration Process Based on AADL

With the great development of integrated modular avionics (IMA), the dynamic reconfiguration of IMA not only provides great advantages in resource utilization and aircraft configuration but also acts as a valid means for resource failure management. It is very vital to ensure the correction of the IMA dynamic reconfiguration process. The analysis of the dynamic reconfiguration process is a significant task. The Architecture Analysis & Design Language (AADL) is widely used in complicated real-time embedded systems. The language can describe the system configuration and the execution behaviors, such as configuration changes. Petri net is a widely used tool to conduct simulation analysis in many aspects. Therefore, we proposed a modeling method of IMA dynamic reconfiguration based on AADL mode, behavioral annex and error model annex in the system level. The model is our first step to analyze and solve the safety problem of IMA system. It can benefit deep analyzing about dynamic reconfiguration of IMA system as the foundation.

The FORA Fog Computing Platform for Industrial IoT

Industry 4.0 will only become a reality through the convergence of Operational and Information Technologies (OT & IT), which use different computation and communication technologies. Cloud Computing cannot be used for OT involving industrial applications, since it cannot guar-antee stringent non-functional requirements, e.g., dependability, trustworthiness and timeliness. Instead, a new computing paradigm, called Fog Computing, is envisioned as an architectural means to realize the IT/OT convergence. In this paper we propose a Fog Computing Platform (FCP) reference architecture targeting Industrial IoT applications. The FCP is based on: deter-ministic virtualization that reduces the effort required for safety and security assurance; middle-ware for supporting both critical control and dynamic Fog applications; deterministic networking and interoperability, using open standards such as IEEE 802.1 Time-Sensitive Networking (TSN) and OPC Unified Architecture (OPC UA); mechanisms for resource management and or-chestration; and services for security, fault tolerance and distributed machine learning. We pro-pose a methodology for the definition and the evaluation of the reference architecture. We use the Architecture Analysis Design Language (AADL) to model the FCP reference architecture, and a set of industrial use cases to evaluate its suitability for the Industrial IoT area.

Polychronous automata and their use for formal validation of AADL models

This paper investigates how state diagrams can be best represented in the polychronous model of computation (MoC) and proposes to use this model for code validation of behavior specifications in Architecture Analysis & Design Language (AADL). In this relational MoC, the basic objects are signals, which are related through dataflow equations. Signals are associated with logical clocks, which provide the capability to describe systems in which components obey multiple clock rates. We propose a model of finite-state automata, called polychronous automata, which is based on clock relationships. A specificity of this model is that an automaton is submitted to clock constraints, which allows one to specify a wide range of control-related configurations, being either reactive or restrictive with respect to their control environment. A semantic model is defined for these polychronous automata, which relies on boolean algebra of clocks. Based on a previously defined modeling method for AADL software architectures using the polychronous MoC, the proposed model is used as a formal model for the AADL behavior annex. This is illustrated with a case study involving an adaptive cruise control system.

Doctoral Dissertation — Augmenting a Hazard Analysis Method with Error Propagation Information for Safety-Critical Systems

Safety-critical systems need specific activities in the software development life cycle to ensure that the system will operate safely. The objective of this dissertation is to develop a new safety analysis method to identify hazards. The method uses error propagation information and the internal structure rather than the interfaces of a system. We propose development procedures to augment STPA (System-Theoretic Process Analysis) with error propagation information derived from the architecture description of a system represented in the AADL (Architecture Analysis Design Language). We will focus on how the AADL error ontology can be used to assist in identifying errors, how those errors propagate among components, and whether the errors lead to hazards in the system. Our research shows that tracing error propagation leads to the discovery of hazards and additional information that other methods miss. The new safety analysis method, Architecture Safety Analysis Method (ASAM), by augmenting STPA with early design information, is able to find more hazards, unsafe control actions, safety constraints and causes of the unsafe control actions than by using STPA alone. Our method leaves more false positives than STPA, but in safety analysis having false positive is preferred over missing actual hazards. We use the AADL error ontology to rigorously describe system component errors and how they propagate among components. We illustrate this rigorous description through several examples and we demonstrate that it yields hazards that an STPA analysis of the example did not find. In addition, we provide a mathematical notation and expressions so that formal analysis and verification of the hazards can be done to ensure that all causes of the hazards have been identified and that any developed safety constraints fully mitigate the hazards, through the use of compositional reasoning.

Research on AADL Model for Qualitative Safety Analysis of Embedded Systems

As embedded software is taking an important part in safety critical filed, how to ensure the safety of safety-critical software has recently become a research focus. Developing safety-critical and highly reliable systems almost always includes significant emphasis on safety analysis and risk assessment. There have been substantial improvements in automation and formalization of other aspects of critical system engineering. However, safety analysis and risk assessment are still largely manual and informal activities and tool support is limited. In this paper, we propose a qualitative safety analysis method of embedded system based on AADL (Architecture Analysis & Design Language) model. Firstly, we extend the Error Model Annex with the R-FMSE (Risk-based Failure Mode Safety Effect) property to express the failure mode formally. Then, we give a detail illustration for qualitative safety analysis based on AADL model. Thirdly, we give a algorithm to develop a R-FMSE analysis Eclipse plug-in to realize the automation of the method. On using the Isolette system (an infant incubator), a case study is demonstrated the feasibility of this method.

SBESC 2013 guest editor’s introduction

In 2013, Brazilian Symposium on Computing Systems Engineering (SBESC) received 46 full submissions. From those submissions, six were identified as Best Paper Candidates by the program committee and thus also were invited to appear in this special issue of DAEM. We invited the authors of all six papers to submit a revised paper for consideration in this journal, and five chose to do so. After a strict review process we selected three papers for inclusion in this special issue. The excellent result is now available to the readers of DAEM! The first paper is “A Multiple-ISA Reconfigurable Architecture” by Fernanda Mathias Capella, Marcelo Brandalero, Luigi Carro and Antonio Carlos Beck. In this paper the authors propose a new mechanism based on a dynamic two-level binary translation (BT) system in order to generate code for a dynamic reconfigurable array. In conclusion, the proposed mechanism provides a way to the designer take advantage of a BT system and program for multiple application fields, without worrying about the underlying architecture. The second paper is “Cyber-Physical Systems Design: Transition from Functional to ArchitecturalModels” byRosane Fatima Passarini, Leandro Buss Becker, JeanMarie Farines and Joao Miguel Fernandes. In this paper the authors propose an approach called Assisted Transformation ofModels (AST), which aims at transforming functional (simulation)models designed in the Simulink environment into architectural models represented in the Architecture Analysis & Design Language (AADL). The use and benefits of the proposed approach are exemplified through a case study focused on the design of a typical CPS: an Unmanned Aerial Vehicle. The third paper is “Network design and planning of wireless embedded systems for industrial automation” by Ramon Hugo de Souza, Stefano Savazzi and Leandro Buss Becker. This

Timed behavioural modelling and affine scheduling of embedded software architectures in the AADL using Polychrony

High-level modelling languages and standards, such as Simulink, UML, SysML, MARTE and AADL (Architecture Analysis & Design Language), meet increasing adoption in the design of embedded systems in order to carry out system-level analysis, verification and validation (V&V) and architecture exploration, as early as possible. These analysis, V&V, architecture exploration techniques rely on mathematical foundations and formal methods in order to avoid semantics ambiguities in the design of safety-critical systems.In order to support integration validation, it is necessary to define a formal framework of virtual prototyping to integrate, verify, exercise and analyse the application code generated by modelling tools as early as possible and virtually integrate it with simulators of third-party middleware and hardware. Such a virtual prototyping platform makes it possible to validate the expected behaviour of the final application software and check that the resulting system indeed meets the specified performance requirements before the actual hardware even actually exists.In this paper, we present the definition, development and case-study validation of such a comprehensive framework, based on the synchronous paradigm and the polychronous model of computation and communication of its supportive open-source toolset: Polychrony. A longer-term aim of our work is to equip the AADL standard with an architecture-centric framework allowing for synchronous modelling, verification and synthesis of embedded software.

Exploring system architectures in AADL via Polychrony and SynDEx

Architecture analysis & design language (AADL) has been increasingly adopted in the design of embedded systems, and corresponding scheduling and formal verification have been well studied. However, little work takes code distribution and architecture exploration into account, particularly considering clock constraints, for distributed multi-processor systems. In this paper, we present an overview of our approach to handle these concerns, together with the associated toolchain, AADL-Polychrony-SynDEx. First, in order to avoid semantic ambiguities of AADL, the polychronous/multiclock semantics of AADL, based on a polychronous model of computation, is considered. Clock synthesis is then carried out in Polychrony, which bridges the gap between the polychronous semantics and the synchronous semantics of SynDEx. The same timing semantics is always preserved in order to ensure the correctness of the transformations between different formalisms. Code distribution and corresponding scheduling is carried out on the obtained SynDEx model in the last step, which enables the exploration of architectures originally specified in AADL. Our contribution provides a fast yet efficient architecture exploration approach for the design of distributed real-time and embedded systems. An avionic case study is used here to illustrate our approach.

Polychronous modeling, analysis, verification and simulation for timed software architectures

High-level modeling languages and standards, such as Simulink, SysML, MARTE and AADL (Architecture Analysis & Design Language), are increasingly adopted in the design of embedded systems so that system-level analysis, verification and validation (VV an original clock-based timing analysis and validation of the overall system is achieved via a formal polychronous/multi-clock model of computation. In order to avoid semantics ambiguities of AADL and Simulink, their features related to real-time and logical time properties are first studied. We then endue them with a semantics in the polychronous model of computation. We use this model of computation to jointly analyze the non-functional real-time and logical-time properties of the system (by means of logical and affine clock relations). Our approach demonstrates, through several case-studies conducted with Airbus and C-S Toulouse in the European projects CESAR and OPEES, how to cope with the system-level timing verification and validation of high-level AADL and Simulink components in the framework of Polychrony, a synchronous modeling framework dedicated to the design of safety-critical embedded systems.

Qualitative Comparison of ADL-Based Approaches to Real-World Automotive System Development

This paper presents two different model-based approaches that use multiple architecture description languages (ADLs) for automotive system development. One approach is based on AADL (Architecture Analysis & Design Language), and the other is a collaborative approach using multiple languages: SysML (Systems Modeling Language) and MARTE (Modeling and Analysis of Real-Time and Embedded systems). In this paper, the detailed modeling steps for both approaches are explained through a real-world automotive development example: a cruise control system. Moreover, discussion of the modeling steps offers a qualitative comparison of the two approaches, and then clarifies the characteristics of the different types of ADLs.