Architectural Support For Programming Languages Research Articles

Does Academic Research Drive Industrial Innovation in Computer Architecture?—Analyzing Citations to Academic Papers in Patents

Examines the number of citations to papers published in International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), International Symposium on High- Performance Computer Architecture (HPCA), International Symposium on Computer Architecture (ISCA), and International Symposium on Microarchitecture (MICRO). Given that these four conferences are the most prestigious in computer architecture, they are an excellent proxy for academic research as they likely contain the most innovative ideas. As such, papers from these conferences could provide important building blocks for a company’s patented inventions; if so, these papers should be cited in the company’s patents.

ASPLOS Report

The ACM Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) is an annual, ACM-sponsored conference that brings together roughly 300,350 researchers and students from the computer architecture, programming languages, and systems research communities. The 25th ASPLOS was scheduled in Lausanne, Switzerland, on March 16–20, 2020, with two days of tutorials and workshops, and three days of dual-track conference sessions. With a 36% increase in paper submission this year and the resulting record-sized program of 86 papers, we anticipated an increased attendance of 400–500 participants.

Synthetic DNA for Data Storage—Tantalizing but Pricey, Not yet Practical

Synthetic DNA is looking increasingly promising as a compact means for storing and retrieving different types of data, including text and images, according to Luis Ceze and Georg Seelig at the University of Washington, Doug Carmean and Karin Strauss of Microsoft Research, also in Seattle, and their collaborators. Their approach to exploiting DNA for data storage offers improved “controllable redundancy, reliability, and [information-storage] density” over previous attempts and is one of the first systems that uses DNA molecules to store digital images and retrieve them intact, they say. Details were presented last April in Atlanta during the annual Association for Computing Machinery International Conference on Architectural Support for Programming Languages and Operating Systems (https://homes.cs.washington.edu/luisceze/publications/dnastorage-asplos16.pdf).

Thread Assignment in Multicore/Multithreaded Processors: A Statistical Approach

The introduction of multicore/multithreaded processors, comprised of a large number of hardware contexts (virtual CPUs) that share resources at multiple levels, has made process scheduling, in particular assignment of running threads to available hardware contexts, an important aspect of system performance. Nevertheless, thread assignment of applications running on state-of-the art processors is an NP-complete problem. Over the years, numerous studies have proposed heuristic-based algorithms for thread assignment. Since the thread assignment problem is intractable, it is in general impossible to know the performance of the optimal assignment, so the room for improvement of a given algorithm is also unknown. It is therefore hard to decide whether to invest more effort and time to improve an algorithm that may already be close to optimal. In this paper, we present a statistical approach to the thread assignment problem. First, we present a method that predicts the performance of the optimal thread assignment, based on the observed performance of each thread assignment in a random sample. The method is based on Extreme Value Theory (EVT), a branch of statistics that analyses extreme deviations from the population mean. We also propose sample pruning, a method that significantly reduces the time required to apply the statistical method by reducing the number of candidate solutions that need to be measured. Finally, we show that, if no suitable heuristic-based algorithm is available, a sample of several thousand random thread assignments is enough to obtain, with high confidence, an assignment with performance close to optimal. The presented approach is architecture and application independent, and it can be used to address the thread assignment problem in various domains. It is especially well suited for systems in which the workload seldom changes. An example is network systems, which typically provide a constant set of services that are known in advance, with network applications performing a similar processing algorithm for each packet in the system. In this paper, we validate our methods with an industrial case study for a set of multithreaded network applications on an UltraSPARC T2 processor. This article is an extension of our previous work [44] , which was published in Proceedings of 17th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-2012).

StreamPI: a stream-parallel programming extension for object-oriented programming languages

Because multicore CPUs have become the standard with all major hardware manufacturers, it becomes increasingly important for programming languages to provide programming abstractions that can be mapped effectively onto parallel architectures. Stream processing is a programming paradigm where computations are expressed as independent actors that communicate via FIFO data-channels. The coarse-grained parallelism exposed in stream programs facilitates such an efficient mapping of actors onto the underlying multicore hardware. We propose a stream-parallel programming abstraction that extends object-oriented languages with stream-programming facilities. StreamPI consists of a class hierarchy for actor-specification together with a language-independent runtime system that supports the execution of stream programs on multicore architectures. We show that the language-specific part of StreamPI, i.e., the class hierarchy, can be implemented as a library-level programming language extension. A library-level extension has the advantage that an existing programming language implementation need not be touched. Legacy-code can be mixed with a stream-parallel application, and the use of sequential legacy code with actors is supported. Unlike previous approaches, StreamPI allows dynamic creation and subsequent execution of stream programs. StreamPI actors are typed. Type-safety is achieved through type-checks at stream graph creation time. We have implemented StreamPI's language-independent runtime system and language interfaces for Ada 2005 and C++ for Intel multicore architectures. We have evaluated StreamPI for up to 16 cores on a two CPU 8-core Intel Xeon X7560 server, and we provide a performance comparison with StreamIt (Gordon et al. in International Conference on Architectural Support for Programming Languages and Operating Systems, 2006), which is the de facto standard for stream-parallel programming. Although our approach provides greater programming flexibility than StreamIt, the performance of StreamPI compares favorably to the static compilation model of StreamIt.

Second International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-II): Advance Program

Second International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-II): Advance Program

Call for Papers Special Issue on Architectural Support for Programming Languages and Operating Systems

Call for Papers Special Issue on Architectural Support for Programming Languages and Operating Systems

Second International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-II)

Second International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-II)

Symposium on Architectural Support for Programming Languages and Operating Systems

Symposium on Architectural Support for Programming Languages and Operating Systems