Application Of Solder Paste Research Articles

Microstructural Evolution of Intermetallic Compound Between SN100C Solder and ENIMAG Substrate During Isothermal Ageing

SN100C alloy emerges as a promising candidate when introducing lead-free solder alternativesdue to its mechanical properties and solderability. The study aims to explore interfacial reactions between SN100C solder and ENIMAG surface finish. Methods involve preparingENIMAG substrates, solder paste application, and reflow processes following JEDEC standards. Isothermal ageing treatments were conducted, and interfacial reactions were characterized using top surface and cross-section analyses via Optical Microscope (OM), Scanning Electron Microscope (SEM), and Energy Dispersive X-ray (EDX). Post-reflow, distinct IMC layers formed at the SN100C/ENIMAG solder joint's interface, evolving with ageing. Further analysis via cross-section confirms the initial formation of (Ni, Cu)3Sn4 layer followed by (Cu, Ni)6Sn5, each exhibiting varying appearance and thicknesses. Isothermal ageing increases IMC thickness, which is particularly influenced by Cu diffusion and exposure to high temperatures, and itfacilitates the growth rate of IMCs.

A method for minimizing voids in solder joints on a printed circuit board

Formulation of the problem. When mounting electronic components on a board during the soldering process, voids inevitably form inside the connection. There are especially many of them in solder joints that have a large area. These voids impair thermal conductivity and generally reduce both the mechanical and electrical reliability of the contact. Therefore, finding ways to reduce the impact of this defect is a fairly urgent task. Target. Consider the effect of solder mask roughness on the distribution of flux around the contact pad, and also identify the dependence of the formation of voids on the configuration and thickness of solder paste application. Results. More active fluxes have been shown to produce fewer voids in terms of average total area covering the pad. Analysis of samples prepared using modified stencils showed a significantly lower proportion of voids than when using a standard stencil. In addition, it has been shown that the choice of solder mask type has a significant impact on the formation of voids in solder joints. The best results were achieved using a thin stencil with a larger aperture when the printed circuit boards were without a solder mask, and the surface has the greatest roughness. However, when modified, thicker, smaller aperture stencils were used, the solder mask had no effect on void formation. Thus, it was found that stencil modification can be recognized as a more preferable and effective way to minimize voids in solder joints. Practical significance. The results obtained can be used to improve the reliability of radio-electronic equipment by selecting optimal soldering technology parameters that affect the reduction of the number of voids in solder joints of components on the board.

Detection of solder paste defects with an optimization‐based deep learning model using image processing techniques

Purpose In the production processes of electronic devices, production activities are interrupted due to the problems caused by soldering defects during the assembly of surface-mounted elements on printed circuit boards (PCBs), and this leads to an increase in production costs. In solder paste applications, defects that may occur in electronic cards are usually noticed at the last stage of the production process. This situation reduces the efficiency of production and causes delays in the delivery schedule of critical systems. This study aims to overcome these problems, optimization based deep learning model has been proposed by using 2D signal processing methods. Design/methodology/approach An optimization-based deep learning model is proposed by using image-processing techniques to detect solder paste defects on PCBs with high performance at an early stage. Convolutional neural network, one of the deep learning methods, is trained using the data set obtained for this study, and pad regions on PCB are classified. Findings A total of six types of classes used in the study consist of uncorrectable soldering, missing soldering, excess soldering, short circuit, undefined object and correct soldering, which are frequently used in the literature. The validity of the model has been tested on the data set consisting of 648 test data. Originality/value The effect of image processing and optimization methods on model performance is examined. With the help of the proposed model, defective solder paste areas on PCBs are detected, and these regions are visualized by taking them into a frame.

Failure Analysis and Evaluation of Material Compatibility of Solder Paste

Solder paste is mainly used for welding of resistance, capacitance, integrated circuit (IC) and other electronic components in surface mounted technology (SMT) industry, and the performance of solder paste has a significant impact on the reliability of electronic components. In this paper, processing defects, failure cases and mechanism of electronic components caused by solder paste are analyzed systematically. Improper application of solder paste during welding can lead to numerous processing defects including poor wetting, tombstoning, bridging, solder joint crack, solder ball spattering, corrosion and so on. Finally, an evaluation method of material compatibility is described in this paper, which provides a reference for ensuring the quality of electronic process material and improving the reliability of SMT products.

RATIONING ASSEMBLY-MOUNTING WORKS AT THE DEVELOPING ELECTRONIC EQUIPMENT FOR NUCLEAR POWER PLANTS

Objectives The aim of the study is to simulate assembly and installation work when creating equipment for nuclear power plants based on radio electronicsMethod The study is based on methods of mathematical modeling of technological processes.Result This work is the structuring of knowledge on the assembly and installation of electronic equipment for nuclear power plants. Known methods for the production of printed circuit boards are described. Since the application of solder paste is one of the most responsible technological methods, to minimize the occurrence of defective prints, it is necessary to precisely select the components and make the appropriate chemical composition. For the model of the “Entry-Exit” system, the parameters of the input and disturbing array are shown.Conclusion Taking into account the parametric dependences and the effect of fatigue during sequential operation, an equation is obtained that allows, as a first approximation, to normalize assembly and installation works. Mounted mounting is not taken into account in the equation, as This process is more rational to carry out during the direct assembly of equipment or its components.

Residual free solder process for fluxless solder pastes

Purpose For soldering, flux is essential because it enables the wetting of the molten solder. Fluxless soldering, i.e. residue-free soldering with the aid of gaseous activators, has been known for many years, but is only well established in the field of opto- and microwave electronics where the solder is applied as preform. In high-volume SMD applications where solder paste is printed, this technology is rarely used until now. The reducing effect of a gaseous activator like formic acid vapor on certain solder alloys is known in practice. However, the corresponding reactions which occur under soldering conditions in nitrogen atmosphere have so far not been systematically investigated for different solder alloys. This study aims to analyze the different chemical reaction channels which occur on the surface of different solders, i.e. catalytical dissociation of formic acid on the pure or oxidized metal surface and the formation and evaporation of metal formates. Based on this analysis, a residue-free solder process under formic acid is developed for solder paste applications. Design/methodology/approach In this paper, different solder alloys (SnAgCu, SnPb, BiSn, In) were analyzed with thermal gravimetric analysis (TGA) under formic acid flow. Details on mass change depending on the soldering temperature are presented. Activation temperatures are estimated and correlated to the soldering processes. Based on the analysis, fluxless solder pastes and suitable soldering processes are developed and presented. Major paste properties such as printability are compared to a commercial flux solder paste. High-power flip chip LEDs which can be assembled directly on a printed circuit board are used to demonstrate the fluxless soldering. Likewise, the soldering results of standard paste and fluxless paste systems after a reflow process are evaluated and compared. Findings The experimental results show that TGA is an efficient way to gain deeper understanding of the redox processes which occur under formic acid activation, i.e. the formation of metal formates and their evaporation and dissociation. It is possible to solder residue-free not only with preforms but also with a fluxless solder paste. The resulting solder joints have the same quality as those for standard solder paste in terms of voids detected by X-ray and mechanical shear strength. Originality/value In the fluxless soldering process, the reduction of oxide layers, and therefore the wetting of the solder spheres, is enabled by gaseous formic acid. After the soldering process, no cleaning process is necessary because no corrosive residues are left on the circuit boards and components. Therefore, soldering using solder paste without aggressive chemical ingredients has a high market potential. Expensive preforms could be replaced by paste dispensing or paste printing.

Rapid Prototyping Tape Stencils for the Application of Solder Paste

Abstract This works describes a promising method for rapid prototyping tape stencils for the application of solder paste. This process is appropriate for research settings requiring developmental flexibility and the ability to deal with small device dies. This work compares the volume of solder paste deposited versus aperture volume for several common tape materials and several common printed circuit board (PCB) stencil materials. The solder deposits are then reflowed to identify which aperture and solder paste parameters can generate successful solder bumps. Electrically conductive solder bonds for small bond pads (100 μm and larger) are demonstrated between silicon device dies and glass dies using this process.

Investigation of Quilt Packaging Interchip Interconnect With Solder Paste

We investigate mechanical, thermal, and microwave characteristics of the edge-interconnect scheme called quilt packaging (QP), using a pin transfer method for the application of solder paste. A novel pull test method for QP is introduced, and the pull strength for edge copper nodules is investigated. Thermal shock tests for QP interconnects with solder are performed. Pull strengths for QP interconnects before and after thermal shock are compared and failure mechanisms of QP are investigated. The simulation and experimental results show that QP provides ultrawidebandwidth, and the use of solder paste does not significantly affect the microwave performance of QP.

Developing a Repeatable and Reliable Rework Process for Lead-Free Fine-Pitch BGAs

Area array components are increasingly used to miniaturize modern day circuitry. Assembling these surface-mount components using lead-free solder pastes has been the subject of interest for several years. Reworking a ball grid array (BGA) is complicated as the solder joints are hidden underneath the component. The process window to rework a BGA is narrow. There are several critical factors which complicate and affect the repeatability of the rework process. The objective of this research is to develop a reliable and repeatable process to rework lead-free fine-pitch BGAs. The process steps to rework a BGA are component removal, site redressing, solder paste/flux deposition, component replacement, and reflow. This study applied designed experiments to evaluate multiple alternatives for several rework process steps. Two alternatives for site redressing, namely copper wick with soldering iron and vacuum desoldering are evaluated. Similarly, the application of solder paste versus flux is compared. A localized reflow method at the rework machine is compared with solder reflow using a reflow oven. The pros and cons of using the two reflow methods and the effect of multiple reflow cycles on solder joint reliability is discussed. Nozzles with and without thermal shields were evaluated. A nozzle with deflectors on the outer side was found to work satisfactorily. Localized reflow in a semiautomated rework machine resulted in partial reflow of components adjacent to the reworked BGA. Thermal repeatability was also a concern. A 15degC drop in temperature was observed with the use of CoolCaps. The soldering iron with wick redressing method was less time consuming. Applying paste using a ministencil posed challenges due to lack of real-estate around the reworked BGA. A reliability study consisting of cross-sectional analysis, scanning electron microscopy (SEM), thermal shock, and thermal cycling were conducted to determine the reliability of the reworked solder joints. The copper wick with soldering iron method was favorable in terms of cycle time. The reflow oven is preferred as it avoids partial reflow of adjacent components. Localized reflow is effective when CoolCaps are used. The flux attachment process was easier as the real-estate around the reworked BGA is very limited. All the assemblies subjected to thermal shock and cycling passed the functional test.

Development of an integrated reflow soldering control system using incremental hybrid process knowledge

In this paper, we present an industrial application of intelligent knowledge-based reflow soldering control system to economically determine process parameters and assess the outputs for surface mount assembly. The system performance of surface mounting is significantly affected by three major interconnected process segments (including solder paste application, component placement, and solder reflow) and in combination. Many surface mount manufacturers have suffered both quality and productivity losses due to the lacks of effective line setup procedures, rapid process troubleshooting, and appropriate corrective action. This proposed system develops an integrated process control scheme, the framework of hybrid process knowledge extraction through neuro-fuzzy data training, and a knowledge-based system with a GUI man-machine interface for predicting and controlling the given system performance. The efficiency and effectiveness of the proposed system are illustrated using DPMO measurement and productivity analysis.

Development and validation of a lead-free alloy for solder paste applications

A lead-free solder alloy has been developed and, in form of a solder paste, validated for use in the assembly of surface mount printed circuit boards (PCB). Liquidus and solidus temperatures have been measured by thermal analysis and an optimum composition selected. Wetting balance tests have been done comparing the performance of the alloy with that of 60/40 tin/lead (SnPb), 99/1 tin/copper (SnCu) and 96.5/3.5 tin/silver (SnAg) alloys on bare copper (Cu) coupons. The tests showed faster wetting for the alloy than for the SnAg and SnCu alloys, with results under some conditions comparable to those achieved with 60/40 SnPb. A no-clean rosin base solder paste was made up with the alloy and used to assemble 20 standard mobile phone PCBs. The boards were successfully soldered by nominally raising the reflow temperature, but only by 10/spl deg/C as compared with eutectic SnPb pastes. Solder joint reliability was tested by temperature cycling Pb-free and 63/37 soldered boards between -25/spl deg/C and +125/spl deg/C for 1000 cycles. Results as assessed by metallographic analysis were better for the Pb-free alloy than for the reference SnPb alloy.

Screen Printing is a Science, not an Art

In a production environment, the first process applied to a bare printed circuit board is generally the application of solder paste. It has been reported that 60% of all rework is attributable to poor quality solder paste deposition. If this process is not understood or the incorrect selection of paste, screen/stencil or squeegee is used, then regardless of technical capabilities of the printer, it will not be possible to achieve accurate and repeatable quality of work. This paper reports on the basics of solder paste deposition with mathematical formulas and diagrams to support the correct selection of criteria. Most importantly, it is intended to assist in the selection process and provide an understanding of the reasons for selecting a specific solder/stencil/squeegee to be used in conjunction with the printer. Written and compiled from a production (real world) view‐point, this paper recognises that it is certainly possible to use a non‐standard process parameter, and still achieve ultra‐fine pitch print capability in laboratory or small batch scenario. But primarily this paper is a guidance and recommendation to achieve excellent results, with as large a process window as is possible for production purposes.

High Quality Solder Pastes:

As electronic devices have become more complex and interconnection density has increased, electronics manufacturers are facing new challenges to solder SMD packages with pitches down to 0.3 mm or less. To achieve positive results, all parameters throughout the soldering process have to be optimised. The first step on the SMT line is the application of solder paste. Any faults at this stage (material, equipment or process related) will be carried through the entire production line. Solder paste is one of the most important factors in the whole chain. It is important to understand the influence of the metal powders, activators, solvents and additives on soldering of ultra‐fine pitch SMDs. Special attention must be paid to the powder (fine pitch devices demand a fine grain in the solder paste). The reliability of the soldered joints is mainly dependent (apart from on the solder paste) on the solder quantities applied to the component pads, the tolerance regarding the shape and size of stencils + PCBs + SMDs, the accuracy of mounting and printing, and on the reflow profile. It is important to design the stencil apertures with sufficient surface area to provide enough surface tension (between the paste and the component pad) to pull the solder paste out of the stencil, while keeping the component pad small enough to match the lead of the component. As the wetting of fine pitch components is especially critical, it is necessary to pay more attention to the design of the reflow profile. It is recommended to solder ultra‐fine pitch components under nitrogen, as this enlarges the process window considerably.

Closed loop quality control in printed circuit assembly

Almost 30-50% of fabrication costs in electronics production are caused by testing and repair operations. The reasons for that problem are many. First of all, there is still a lack of knowledge concerning the conditions for robust process control. On the other hand, uncertain specification of product quality causes unnecessary inspection, testing, and repair actions. Thus, a strategy for yield improvement requires strong dedication to causal relationships and specification of process and product quality. In the first step, critical process parameters and their causal effects on product quality must be analyzed. In the second step, once critical process parameter are addressed, control strategies can be developed to assure high first pass yields. This paper gives an overview of ongoing work that has been performed to establish a SMT production line with closed loop quality control via direct process monitoring capabilities and integrated inspection operations. For different inspection tasks, 3-D laser and X-ray inspection is applied. Process parameters as well as test and inspection results are gathered on line. Thus, interrelationships between different process steps, beginning from material inspection, solder paste application, components placement, reflow soldering, and final inspection, can be analyzed. Moreover, variation of process parameters conforming to different approaches to design of experiments (DOE) can be performed while running production. On-line diagnosis of process parameters and inspection results enables a closed loop quality control.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

New Products

Stork Graphics has recently introduced the HiMesh Mask specially suited to surface mount technology applications. This screen printing mask, made of 100% nickel, differs from metal masks and traditional stainless steel or polyester mesh in that it encompasses many of the advantages of both. It has the flexibility of a steel or polyester screen combined with the typical stencil qualities of zero deformation and dimensional stability. The hexagonal structure, and therefore the wall and hole shape, means that both on and off contact printing are possible. Additionally, this material provides a very uniform and flat deposit, an essential criterion in the application of solder paste.

Comparing Vision‐aided Stencil Printers

Surface Mount Technology relies on the use of screen or stencil printers for solder paste application. Many systems now incorporate complex vision systems to provide improved accuracy during printing. These systems advertise sub‐mil precision (x1|+3o&lt;0·001 in.) but none provides a method to quantify this precision. With the advent of fine pitch pads [pad pitch ≤0·025 in.), accurate characterisation of the printing machine's capabilities is imperative for a successful manufacturing process. This paper will present a quantitative method with supporting experimental data, for analysing the printing capabilities of the stencilling machine.