The paper for the parallel model of computation, a modification of the method of implementing the multiplication of multi-digit integers based on the fast Fourier transform (FFT) avoiding the bit-reversed ordering is proposed. The paper researches the calculation of FFT according to the “butterfly” scheme based on decimation-in- frequency and decimation-in-time methods, an input signal with elements in direct and bit-reversed order, with an increase and decrease in the number Fourier series coefficients at each step of the "butterfly", the use of a list of Fourier series coefficients in direct and bit-reversed order. The standard FFT-based multiplication algorithm uses the same “butterfly” operation to compute the forward and inverse Fourier transforms. The paper analyzes two combinations of the FFTFDN–FFTTBN and FFTFBN–FFTTDN “butterfly” calculation schemes for calculating forward and inverse discrete Fourier transforms (DFT) in the case of implementing the multi-digit operation in parallel computational model to exclude bit-reversed permutation. A scheme for distributing calculations among four processors is proposed, in which forward and inverse Fourier transform calculations are localized within one parallel processor. The proposed modification does not reduce the computational complexity in terms of the number of complex operations, but due to the exclusion of bit-reversed permutation, the number of synchronization commands between processors and data is reduced, which reduces the algorithm execution time. The scheme can be adapted to distribute the computations among a larger number of processors. Four algorithms for implementing FFT based on decimation-in-frequency and decimation-in-time methods, an input vector with elements in direct and bit-reversed orders are presented. To check the result of the calculation, the algorithm of multiplication avoiding the steps of bit-reversed ordering was implemented in the APL programming language. An example of calculation is given in the form of a table.