Single Event Upset Analysis Research Articles

Analysis of Single-Event Upsets and Transients in 22 nm Fully Depleted Silicon-On-Insulator Logic

In this work, single-event upset (SEU) and single-event transient (SET) responses of digital logic in a planar 22nm fully-depleted conventional-well silicon-on-insulator (FD-SOI) technology under various test conditions are presented. The D-flip-flop (DFF) shift registers used for the single-event upset experiments are more sensitive to upsets when data is dynamically loaded in during irradiation rather than statically stored beforehand, but the clock rate used to load the data does not affect the upset cross sections in any significant way. The digital pattern loaded also affects the upset cross sections, but which cross section is greater between patterns of all “1s” and all “0s” is observed to be opposite for dynamic and static tests. A key capability of the technology studied in this work is the ability to apply biases to the back gates of transistors to alter threshold voltage. For conventional-well designs, as in this work, reverse body bias can be applied, increasing the threshold voltage and decreasing leakage current. Analyzing the effects of applying a back-gate bias on single-event upset cross section reveals no clear trend for single-event upset cross sections in the D-flip-flop shift registers but applying back-gate bias decreased the single-event transient cross sections measured from an inverter chain by as much as an order of magnitude. Supplementary SPICE-level simulations suggest that the drastic decrease in single-event transient cross section results from attenuation in the inverter chain. The presented experimental and simulation results indicate relatively small single-event cross sections compared to other technologies reported in literature.

Semi-Empirical Method for Estimation of Single-Event Upset Cross Section for SRAM DICE Cells

We propose a new semi-empirical method for estimation of Single Event Upset (SEU) cross section for SRAM Dual Interlocked Cells (DICE) with known distance between neighboring sensitive volumes. The method is based on experimental analysis of SEU maps in sub-100 nm 6T SRAM along with layout considerations and SPICE simulations. This method could help designers to estimate the SEE robustness of DICE cells at the design stage.

Monte Carlo simulation based on Geant4 of single event upset induced by heavy ions

The present work is a computational simulation of single event upset (SEU) induced by heavy ions passing through the device with Geant4-tool based on Monte Carlo transport code. Key parameters affecting SEU occurrence are examined, and related geometrical construction and critical charge are quantified. The MUlti-Functional Package for SEU Analysis (MUFPSA) has been successfully programmed and applied for SEU occurrence after the completion of device geometrical construction, critical charge, and SEU cross section calculation. The proposed MUFPSA has yielded a good agreement with MRED. Specifically, the results show that higher LET incident ions lead to increased SEU vulnerability due to more diffusion and higher energy deposition. In addition, the analytical method of radial ionization profile provides a good complementary interpretation.

Comparative study of MC-50 and ANITA neutron beams by using 55 nm SRAM

Single event upset (SEU) is mainly caused by neutrons in the terrestrial environment. In addition, SEU effects become more and more problematic as technology scales. It is, therefore, important to understand the SEU behaviors of semiconductor devices under neutron reactions. ANITA (atmospheric-like neutrons from thick target) in TSL (The Svedberg Laboratory), Sweden, resembles the neutron energy and flux spectrum to neutrons at the terrestrial level and are typically used to estimate the soft error rate (SER). On the other hand, the neutron energy and flux spectrum from the MC-50 cyclotron at KIRAMS (Korea Institute of Radiological & Medical Sciences) differs greatly from the atmospheric environment. The main objective of this work is finding the efficacy of the neutron beam at KIRAMS for a SEU analysis by using a comparative analysis; 55 nm SRAM is used to determine SEU difference under the beams at two different locations. Since MCU (multi-cell upset) is the dominant effect in emerging technologies with smaller critical charges, the MCU cross sections from the two different beam tests are compared.

Analysis of Single-event Upset for SRAM Devices by Using the MC-50 Cyclotron

Analysis of Single-event Upset for SRAM Devices by Using the MC-50 Cyclotron

Delay and Energy Analysis of SEU and SET-Tolerant Pipeline Latches and Flip-Flops

In the presence of radiation, particle strikes can cause temporary signal errors in ICs. Particle strikes that directly affect memory are known as single event upsets (SEUs), while strikes that affect combinational logic and spread to memory are called single event transients (SETs). This paper focuses on SEU and SET-tolerant approaches to constructing pipeline latches and flip-flops. Level-sensitive latches, edge-triggered master-slave flip-flops, and pulse-triggered flip-flops comprise the pipeline memory classes considered in this paper. TPDICE basic cells are utilized to achieve fault-tolerance and transient bypass capability. A number of single-ended and differential structures are presented and evaluated with respect to performance, energy consumption, and complexity. In addition, the SEU and SET tolerance of these structures is demonstrated. All evaluations are based off simulations performed in 90 nm CMOS. Accompanying the above evaluations, this paper also addresses concerns of multiple bit upset (MBU) affecting these designs at the 90 nm technology node. Novel hardened-by-design techniques are introduced to address these concerns, and their effectiveness is quantified.

SEMM-2: a modeling system for single event upset analysis

We describe SEMM-2, a new simulation system for the analysis of radiation-induced single event upsets which builds on the initial SEMM tool. Developed for the current and future CMOS technologies, SEMM-2 improves the generation of radiation events. The atomic databases which describe ion energy loss with transport through device materials are generalized. Enhancements of the nuclear collision event generation include more accurate and efficient methods for generating elastic events and more thorough treatment of inelastic processes. We present illustrative simulations where more accurately accounting for the metallization layers significantly impacts the simulated single event failure rate.

Accurate Analysis of Single Event Upsets in a Pipelined Microprocessor

Modern processors embed features such as pipelined execution units and cache memories that can not be directly controlled by programmers through the processor instruction set. As a result, software-based fault injection approaches are even less suitable for assessing the effects of SEUs in modern processors, since they are not able to evaluate the effects of SEUs affecting pipelines and caches. In this paper we report an analysis of a commercial processor core where the effects of SEUs located in the processor pipeline and cache memories are studied. The obtained results are compared with those software-based approaches provide, showing that software-based approaches may lead to significant errors during the error rate estimation. A major novelty of the paper is an extensive analysis of the effects of SEUs in the pipeline of a commercial processor core during the execution of several benchmark programs.

Mubeam system for study of single event upset of semiconductor devices

A high energy heavy ion mubeam system has just been installed on a beam line of the 3 MV tandem electrostatic accelerator mainly for analysis of single event upset (SEU) of LSI memories in spacecraft. This system was designed for precise beam positioning at a desired muscopic area of the mucircuit, to experimentally evaluate of actual SEU sensitive area, and also to allow single ion hits for observing a transient charge pulse from an SEU. For these purposes, a fair amount of target beam current is required for beam positioning at the desired area. The system is equipped with two lens systems: one to control the target beam current in a wide range down to an extremely low current without any change of the beam optics, and the other to focus heavy ion beams within a spot size of 1 μm. The final goal is to hit a muscopic target area with a single 15 MeV nickel ion.