We investigate the low-temperature transport in 8-nm-diam Si junctionless nanowire field-effect transistors fabricated by top down techniques with a wraparound gate and two different phosphorus doping concentrations. First we extract the intrinsic gate capacitance of the device geometry from a device that demonstrates Coulomb blockade at 12 mK with over 500 Coulomb peaks across a gate-voltage range of 6 V indicating the formation of an island in the entire 150-nm-long nanowire channel. In two other devices, made from silicon on insulator wafers that were doped to an activated dopant concentration of Si:P $4\ifmmode\times\else\texttimes\fi{}{10}^{19}$ and $2\ifmmode\times\else\texttimes\fi{}{10}^{20}\phantom{\rule{4pt}{0ex}}{\text{cm}}^{\ensuremath{-}3}$, we observe quantum interference and use the extracted gate coupling to determine the mean free paths from the dominant energy scale on the gate-voltage axis. For the higher doped device, the analysis yields a mean free path of $4\ifmmode\pm\else\textpm\fi{}2\phantom{\rule{4pt}{0ex}}\text{nm}$, which is on the order of the average spacing of phosphorus atoms and suggests scattering on unactivated or activated dopants. For the device with an implanted phosphorus density of $4\ifmmode\times\else\texttimes\fi{}{10}^{19}\phantom{\rule{4pt}{0ex}}{\text{cm}}^{\ensuremath{-}3}$, the quantum interference effects suggest a mean free path of $10\ifmmode\pm\else\textpm\fi{}2\phantom{\rule{4pt}{0ex}}\text{nm}$, which is comparable to the nanowire width, and thus allows for coherent formation of transversal modes. The results suggest that the low-temperature mobility is limited by scattering on phosphorus dopants rather than the expected surface roughness scattering for nanowires with diameters larger than or comparable to the Fermi wavelength. A temperature-dependent analysis of universal conductance fluctuations indicates a phase-coherence length greater than the nanowire length for temperatures below 1.9 K, and decoherence from one-dimensional electron-electron interactions dominates transport for higher temperatures. Our measurements, therefore, provide insight into scattering and dephasing mechanisms in technologically relevant silicon device geometries, which will help with future design choices with regard to, e.g., doping density.
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