Analog Fault Diagnosis Research Articles

Analog Gross Fault Identification in RF Circuits Using Neural Models and Constrained Parameter Extraction

The demand and relevance of efficient analog fault diagnosis methods for modern RF and microwave-integrated circuits increase with the growing need and complexity of analog and mixed-signal circuitry. The well-established digital fault diagnosis methods are insufficient for analog circuitry due to the intrinsic complexity in analog faults and their corresponding identification process. In this paper, we present an artificial neural network (ANN) modeling approach to efficiently emulate the injection of analog faults in RF circuits. The resulting metamodel is used for fault identification by applying an optimization-based process using a constrained parameter extraction formulation. A generalized neural modeling formulation to include auxiliary measurements in the circuit is proposed. This generalized formulation significantly increases the uniqueness of the faults identification process. The proposed methodology is illustrated by two faulty analog circuits: a CMOS RF voltage amplifier and a reconfigurable bandpass microstrip filter.

A novel binary bat algorithm with chaos and Doppler effect in echoes for analog fault diagnosis

A novel modified binary bat algorithm (MBBA) with chaos and Doppler effect in echoes is presented in this paper to deal with the fault diagnosis problem of analog circuits with tolerance. The proposed method focuses on further mimicking the bats' behaviors and improving the binary bat algorithm (BBA) in view of biology. The proposed algorithm utilizes the bats' self-adaptive compensation for Doppler effect in echoes and the chaotic optimization method to improve the BBA. The elitist strategy is also used to store all the possible global best solutions, which will provide us with more possible choices in practice. Since single feature extraction method has limitations during fault diagnosis of analog circuits with tolerance, several kinds of feature extraction methods are used together to build a big feature set firstly in our method, and then, the new proposed MBBA is used to select the optimal feature subset simultaneously optimize the classifier parameters for the analog fault diagnosis. Three analog circuits' examples are given to demonstrate the effectiveness and generalization ability of our method, and other methods are also used to do comparisons. The results indicate that combining different kinds of feature extraction method together to optimally select the feature subset simultaneously optimize the classifier parameters by MBBA can obtain better performance in dealing with analog fault diagnosis problems, and our proposed method provides a better tradeoff between fault diagnosis accuracy and total cost, which is superior to other methods. Therefore, it is an effective method for analog fault diagnosis and has broad application prospects in practice.

Wavelet-Based Feature Extraction in Fault Diagnosis for Biquad High-Pass Filter Circuit

Fault diagnosis for analog circuit has become a prominent factor in improving the reliability of integrated circuit due to its irreplaceability in modern integrated circuits. In fact fault diagnosis based on intelligent algorithms has become a popular research topic as efficient feature extraction and selection are a critical and intricate task in analog fault diagnosis. Further, it is extremely important to propose some general guidelines for the optimal feature extraction and selection. In this paper, based on wavelet analysis, we will study the problems of mother wavelets selection, number of decomposition levels, and candidate coefficients selection by using a four-op-amp biquad filter circuit. After conducting several comparative experiments, some general guidelines for feature extraction for this type of analog circuits fault diagnosis are derived.

Fault Diagnosis for Analog Circuits by Using EEMD, Relative Entropy, and ELM.

This paper presents a novel fault diagnosis method for analog circuits using ensemble empirical mode decomposition (EEMD), relative entropy, and extreme learning machine (ELM). First, nominal and faulty response waveforms of a circuit are measured, respectively, and then are decomposed into intrinsic mode functions (IMFs) with the EEMD method. Second, through comparing the nominal IMFs with the faulty IMFs, kurtosis and relative entropy are calculated for each IMF. Next, a feature vector is obtained for each faulty circuit. Finally, an ELM classifier is trained with these feature vectors for fault diagnosis. Via validating with two benchmark circuits, results show that the proposed method is applicable for analog fault diagnosis with acceptable levels of accuracy and time cost.

A novel approach for analog fault diagnosis based on stochastic signal analysis and improved GHMM

This paper presents a novel fault diagnosis method to diagnose ordinary soft fault and incipient soft fault for linear analog circuit. Due to the presence of tolerance, the parameter variation of analog component obeys a nearly normal distribution, and the linear circuit responses are considered as a stochastic process. Therefore, three kinds of stochastic series are extracted as fault features. Then, fault feature samples are divided into train samples and test samples. The relevant statistic values of them are calculated as final test samples in the stage of fault testing. In order to diagnose stochastic series effectively, an improved GHMM classifier is designed based on the fault occurrence characteristics of analog component. The stochastic sequences are thought as the observation symbols for the proposed GHMM. Simulation circuits and actual circuits are tested to prove the effectiveness of the new method.

Identification of Circuit Parameters for the Specified or Measured Performances

Abstract Extension of the method of analog circuit parameter identification for the specified design performances, originally presented by the same author in 1982, is described. These parameters are designated by means of PSpice simulation of the adjoint circuit to the original one. In this adjoint circuit, elements of the original circuit, described by the sized parameters, are replaced by controlled sources. Each such source is controlled by the differential voltage or current, difference between the calculated voltage or current and the specified one, with infinitely large gain. The method is applicable to both linear and nonlinear DC circuits and AC circuits and can be used in many fields of analog circuit design, such as: finding of acceptability region, analog fault diagnosis, postproduction identification and tuning. In the later cases, design performances are replaced by measurements of Circuit Under Test (CUT). Simplicity, extremely low computational complexity and high accuracy are the main benefits of the proposed, basic Circuit Theory based, approach - the solution is found after a single PSpice simulation. For better understanding of the presented methodology, five practical examples are discussed

Construction of an Expert System Based on Fuzzy Logic for Diagnosis of Analog Electronic Circuits

Abstract The paper presents construction of the fuzzy logic system to analog circuits parametric fault diagnosis. The classical dictionary construction is replaced by fuzzy rule system. The first part refers to analog fault diagnosis, its techniques, approaches and goals. It clarifies common strategy and define differences between detecting, locating and identifying a fault in analog electronic circuit. The second part is focused on a creation of fuzzy rule expert system with use of sensitivity functions and known circuit topology. To detect, locate and identify a faulty element in a circuit the sensitivity matrix is used. The advantage of the method is its utilization in all, AC, DC and time domain. The fuzzy system, like the classical fault dictionary, can detect and locate single catastrophic faults and, on the contrary to the classical one, it also detects and locates parametric faults. Moreover, it allows identification of these faults, such that sign of the faulty parameter deviation is designated. The method has deterministic character as well as it can be applied on the verification and production stage

A New Test Point Selection Method for Analog Circuit

A new method to select an optimum test point set in analog fault diagnosis is proposed in this paper. As the probability density of the circuit output approximately satisfies the normal distribution, an accurate way for determining the fault ambiguity gap is used to calculate the isolation probability of the faults. The proposed fault-pair isolation table derived from the mean and standard deviation values of node voltage can exactly represent the fault-pair isolation capability of the test points. The special test points that can uniquely isolate some particular fault pairs are selected first. This step can help to save the total cost of the computation time and even find the final solution directly. After removing the isolated fault pairs (rows) and the selected test points (columns), the size of the fault-pair isolation table could reduce dramatically. If more optimum test points are needed, the normalized fault-pair isolation probability values in the table are used to select the right test point that has the largest fault-pair isolation capability among all the candidate test points. Analog circuits' examples and the statistical experiments are given to demonstrate the feasibility and effectiveness of the proposed algorithm. The other reported algorithms are also used to do the comparison. The results indicate that the proposed algorithm has excellent performance in minimizing the size of the test point set. Therefore, it is a good solution and applicable to actual circuits and engineering practice.

A new test points selection method for analog fault dictionary techniques

A new efficient method to select an optimum or near optimum set of test points for fault dictionary techniques in analog fault diagnosis is proposed. This is done by constructing a fault-isolated table firstly according to the integer-coded fault dictionary, and picking the special test points with particular fault isolate abilities out from the candidate test points set. This step can help us save the total cost of computation and even find the global minimum test-point set directly. After this step, the selected test points might isolate most of the defined faults together, and these isolated faults (rows) and the chosen test points (columns) are deleted from the fault dictionary, the dimension of which will reduce quite a lot. And then the inclusive and exclusive approach are combined together to choose other optimum test points from the candidate test points set to solve the problem. Three analog circuits' examples and the statistical experiments are given to demonstrate the feasibility and effectiveness of the proposed algorithm, the existing classical algorithms are also used to do the comparison. The results indicate that the proposed method has a better tradeoff between the solution accuracy and the computational cost, and it is superior to other methods in its computational efficiency and quality of final solution. Therefore, it is a good solution to minimize the size of the test-point set, and practical for medium and large scale systems.

Analog Fault Diagnosis Using Conic Optimization and Ellipsoidal Classifiers

This paper introduces a new fault diagnosis strategy for analog circuits based on conic optimization and ellipsoidal classifiers. Ellipsoidal classifiers are trained for efficient and accurate fault classification of the circuit under test (CUT). In the testing phase, the output of the ellipsoidal classifiers is used to isolate the actual CUT fault. The constructed classifiers exhibit high classification rate with competitive computational complexity even if the CUT has overlapping faults. Experimental results demonstrate the superior performance of the ellipsoidal classifiers in analog fault diagnosis.

Analog fault diagnosis using S-transform preprocessor and a QNN classifier

A novel method for fault diagnosis in analog circuits using S-transform (ST) as a preprocessor and a quantum neural network (QNN) as a classifier is proposed in this paper. The ST provides a frequency-dependent resolution and the features obtained from ST are distinct, and easy to understand. The QNN identifier, a computational tool for fuzzy classification combining the advantages of neural modeling and fuzzy-theoretic principles, has the ability to autonomously detect the presence of uncertainty, adaptively learn the existing uncertainty, properly approximate any membership profile, and autonomously quantify uncertainty in sample data. The comparison between the ST-based method and the wavelet-transform-based method, and comparison between the QNN method and the traditional NN method for analog fault diagnosis is provided. Simulation results show that the proposed method is effective in enhancing the efficiency of the training phase and the performance of the fault diagnostic system. The results clearly indicate more than 97.61% correct classification of fault classes in the example circuits of various sizes in the presence of similar faults.

Handing Tolerance Problem in Fault Diagnosis of Linear-Analogue Circuits with Accurate Statistics Approach

The tolerance handling in analogue fault diagnosis is a challenging problem. Although lots of methods are effective for fault diagnosis, it is hard to apply them to the case with tolerance influence. In this paper, a robust statistics-based approach is introduced for tolerance-influencing fault diagnosis. The advantage of this proposed method is that it can accurately locate the data fusion among fault states. In addition, the results in analogue benchmark (e.g., linear voltage divider circuit) indicate that it is effective in fault diagnosis in accordance with given fault diagnostic requirements (e.g., fault diagnosis error, fault detection rate).

Fault Diagnosis of Analog Circuits Using Systematic Tests Based on Data Fusion

An analog fault diagnosis approach using a systematic step-by-step test is proposed for fault detection and location in analog circuits with component tolerance and limited accessible nodes. First, by considering soft faults and component tolerance, statistics-based fault detection criteria are established to determine whether a circuit is faulty by measuring accessible node voltages. For a faulty circuit, fuzzy fault verification is performed using the accessible node voltages. Furthermore, using an approximation technique, the most likely faulty elements are identified with a limited number of circuit gain measurements at selected frequencies. Finally, employing the D-S evidence theory, synthetic decision is made to locate faults according to the results of fault verification and estimation. Unlike other methods which use a single diagnosis method or a particular type of measurement information, the proposed approach makes use of the redundancy of different types of measurement information and the combined use of different diagnosis methods so as to improve diagnosis accuracy.

Application of SVM Classifier and Fractal Feature in Circuit Fault Diagnosis

Combining SVM and fractal theory, a novel fault diagnosis method for analog circuits based on SVM using fractal dimension is developed in this paper. Simulation results of diagnosing the Sallen-Key band pass filter circuit have confirmed that the proposed approach increases the fault diagnosis accuracy, thereby it may be considered as an alternative for the analog fault diagnosis.

A New Optimal Test Node Selection Method for Analog Circuit

The existing test node selection methods of analog dictionary technique assume that the voltage gap of ambiguity group is 0.7 V. However, this technique is not always accurate to determine the right ambiguity gap for each fault mode. As the probability density of the circuit output approximately satisfies the normal distribution, an accurate technique is introduced to determine the ambiguity gap. Then, this paper proposes a new test node selection method with an extended fault dictionary and the overlapped area values. Firstly, the fault dictionary is constructed with the mean and standard variance values of node voltage. Then, the area detection table is generated by the overlapped area values under normal curves for ambiguity faults, which represent the failure probability of ambiguity faults. Finally, the optimal test node set is selected by fusing fault isolation and overlapped area information. The results show that the proposed method is effective to select the optimal test node set and improve the performance of analog fault diagnosis.

Application of asymmetrical periodic signals as test vectors for analog fault detection: a novel perspective of classical concepts

Analog fault diagnosis is a field of paramount importance, and test signal generation is an important prerequisite for analog fault detection. Several stimuli have been used as input test vectors. This study presents a novel approach for the adoption of classical methods and signals for fault detection. This involves the use of asymmetrical periodic signals and comparison of their effectivity in maximizing output response between faulty and conforming circuits. The technique helps to determine a minimal set of test signals for a circuit. It also enables the test designer to identify the parts of the frequency spectra of various signal types that can pose problems of fault masking and fault dominance. In addition, the technique indicates certain sets of components forming ambiguity groups, which exhibit complementary fault-masking effects. The method does not require access to internal nodes of the circuit. It only requires generation of standard asymmetrical signals and hence can be implemented with the use of commonly available function generators. The technique is applicable to integrated circuits and printed circuit boards, as well as analog subsystems. It can also be applied for fault isolation. The results include responses from representative benchmark analog circuits.

A novel linear ridgelet network approach for analog fault diagnosis using wavelet-based fractal analysis and kernel PCA as preprocessors

We have developed a novel fault diagnosis approach of analog circuits based on linear ridgelet network using wavelet-based fractal analysis, kernel principal components analysis (kernel PCA) as preprocessors. The proposed approach can detect and identify faulty components in the analog circuits by analyzing their time responses. First, using wavelet-based fractal analysis to preprocess the time responses obtains the essential and reduced candidate features of the corresponding response signals. Then, the second preprocessing by kernel PCA further reduces the dimensionality of candidate features so as to obtain the optimal features as inputs to linear ridgelet networks. Meanwhile, we also adopt the kernel PCA to select the proper numbers of hidden ridgelet neurons of the linear ridgelet networks. The simulation results show that the resulting diagnostic system using these techniques can not only simplify the architectures (including input nodes and hidden neurons) and minimize the training and processing time of these networks considerably, but also diagnose single and multiple faults effectively in classifying faulty components of example circuits to improve the accuracy and efficiency of fault diagnosis with a highly correct classification rate.

A novel neural-network approach of analog fault diagnosis based on kernel discriminant analysis and particle swarm optimization

Kernel principal component analysis (KPCA) and kernel linear discriminant analysis (KLDA) are two commonly used and effective methods for dimensionality reduction and feature extraction. In this paper, we propose a KLDA method based on maximal class separability for extracting the optimal features of analog fault data sets, where the proposed KLDA method is compared with principal component analysis (PCA), linear discriminant analysis (LDA) and KPCA methods. Meanwhile, a novel particle swarm optimization (PSO) based algorithm is developed to tune parameters and structures of neural networks jointly. Our study shows that KLDA is overall superior to PCA, LDA and KPCA in feature extraction performance and the proposed PSO-based algorithm has the properties of convenience of implementation and better training performance than Back-propagation algorithm. The simulation results demonstrate the effectiveness of these methods.

Test Points Selection for Analog Fault Diagnosis Using Immune Clonal Selection Algorithm

Test Points Selection for Analog Fault Diagnosis Using Immune Clonal Selection Algorithm

A novel approach for analog fault diagnosis based on neural networks and improved kernel PCA

We have developed a neural-network-based fault diagnosis approach of analog circuits using maximal class separability based kernel principal components analysis (MCSKPCA) as preprocessor. The proposed approach can detect and diagnose faulty components efficiently in the analog circuits by analyzing their time responses. First, using wavelet transform to preprocess the time responses obtains the essential and reduced candidate features of the corresponding response signals. Then, the second preprocessing by MCSKPCA further reduces the dimensionality of candidate features so as to obtain the optimal features with maximal class separability as inputs to the neural networks. This simplifies the architectures reasonably and reduces the computational burden of neural networks drastically. The simulation results show that our resulting diagnostic system can classify the faulty components of analog circuits under test effectively and achieves a competitive classification performance.