Analog Single-event Transients Research Articles

ASET and TID Characterization of a Radiation Hardened Bandgap Voltage Reference in a 28-nm Bulk CMOS Technology

Analog single-event transient (ASET) and total ionizing dose (TID) characterization of a radiation-hardened bandgap voltage reference (BGR) is investigated in a 28-nm commercial bulk CMOS technology. Different radiation hardened by design (RHBD) techniques are used for ASET mitigation in the circuit and layout, and the circuit is optimized to ensure the BGR can still work correctly even using fast nMOS and slow pMOS for TID mitigation. Heavy-ion (linear energy transfer (LET) = 76.3 MeV <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\cdot $ </tex-math></inline-formula> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /mg) experiments show the maximum amplitude of positive (negative) ASET is just 30 mV (90 mV), and Co <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">60</sup> gamma-ray experiments show the maximum output voltage reduction is just 37 mV after 1.2 Mrad(Si) irradiation, and the final output voltage reduction is just 11 mV after 48 h of annealing. All of the experiments indicate that ASET is significantly mitigated by the RHBD techniques, and the BGR has naturally good TID response due to the design margin. The investigation also indicates that the proposed BGR is a good substitute for space application due to the excellent ASET and TID tolerance capability.

Current mirror featuring DTMOS for analog single‐event transient mitigation in space application

Dynamic threshold-voltage MOSFETs (DTMOSs) with bulk and gate tied together are commonly used in ultra-low voltage applications. Since the threshold voltage of the device is a function of its gate voltage, and the current-driving capability is boosted as the gate-source voltage increases, it has the potential to be applied in the community of radiation-hardened IC circuits. This paper firstly demonstrates that DTMOS is particularly suitable for analog single-event transient (ASET) mitigation in cascode current mirrors with negligible penalty. A basic current mirror and a cascode current mirror are modelled to analyze the devices in DTMOS configuration, and compare radiation performance with standard MOSFETs. Simulation results demonstrate that the DTMOS scheme reduces charge collection, and suppresses single-event effect-induced perturbation effectively in the cascode current mirror, while playing a detrimental role in basic current mirrors due to the well-known bipolar effect. This technique provides a novel method for mitigating ASET disturbances for the designers of spaceborne ICs.

Pulse quenching based radiation-hardened by design technique for analog single-event transient mitigation on an operational amplifier in 28 nm bulk CMOS process

In nanometer bulk CMOS processes, multi-node charge collection induced by a heavy-ion strike is prevalent. Pulse quenching caused by charge sharing between the struck node (termed as active device) and the following gate (termed as passive device) has been widely studied in digital circuits. This paper firstly demonstrates that the pulse quenching effect also exists between the adjacent stages of analog circuits and can be used to mitigate analog single-event transient (ASET) perturbation. Contrary to digital circuits, whose propagated SET is minimized with the charge collected by passive device maximized, simulation results indicate that there is an optimal spacing between the active and passive devices in analog circuits. When the spacing is too close, the SET induced by the hit node is efficiently mitigated by pulse quenching effect, but the disturbance caused by the charge sharing collection in passive device becomes dominant. Simulation results show that pulse quenching effect has a dual role in ASET mitigation. This paper provides innovative guidance to the radiation-hardening design for analog circuits.

Pulse Quenching and Charge-Sharing Effects on Heavy-Ion Microbeam Induced ASET in a Full-Custom CMOS OpAmp

In this paper, charge-sharing effects on analog single-event transients are experimentally observed in a fully custom designed, 180-nm complementary metal-oxide-semiconductor (CMOS) operational amplifier by means of a heavy-ion microbeam. Sensitive nodes of the differential stage showed bipolar output transients that cannot be explained by single-node collection for the closed-loop characteristics of the circuit under test. The layout of these transistors is consistent with charge-sharing effects due to deposited charge diffusion. Implementation of linear modeling and simulations of multiple node collection between paired transistors of the input stage showed great coincidence with the obtained experimental waveforms, shaped as bipolar, quenched pulses. These effects are also observed due to dummy transistors placed in the layout. A simple parametrization at the simulation level is proposed to reproduce the observed experimental waveforms. Results indicate that charge-sharing effects should be taken into account during simulation-based sensitivity evaluation of analog circuits, as pulse quenching can alter the obtained results, and linear modeling is a simple approach to emulate simultaneous charge collection in multiple nodes by applying superposition principles, with aims of hardening a design.

Single Event Transients and Pulse Quenching Effects in Bandgap Reference Topologies for Space Applications

An architectural performance comparison of bandgap voltage reference variants, designed in a $0.18~\mu \text {m}$ CMOS process, is performed with respect to single event transients. These are commonly induced in microelectronics in the space radiation environment. Heavy ion tests (Silicon, Krypton, Xenon) are used to explore the analog single-event transients and have revealed pulse quenching mechanisms in analogue circuits. The different topologies are compared, in terms of cross-section, pulse duration and pulse amplitude. The measured results, and the explanations behind the findings, reveal important guidelines for designing analog integrated circuits, which are intended for space applications. The paper includes an analysis on how pulse quenching occurs within the indispensable current mirror, which is used in every analog circuit.

Predictions of Proton Cross-Section and Sensitive Thickness for Analog Single-Event Transients

In linear devices, the strong impact of configuration on the SET characterization makes them very difficult to predict without using particle accelerators for each application. In this work, based on heavy ion data, we propose to simulate proton cross-sections using gateway tools such as SIMPA, PROFIT or the more recent METIS software we developed within Airbus Group. We review four linear devices and show more physically-motivated predictions for METIS than for the two former approaches. Especially, this engineering tool could be used in a reversed manner to determine the sensitive thickness based on the knowledge of both proton and heavy ion cross-sections.

Investigating Pulsed X-ray Induced SEE in Analog Microelectronic Devices

We investigate analog single event transient (ASET) generation in an LM124 operational amplifier using focused pulsed x-rays and 800 nm femtosecond laser pulses. We report improvements that have been made to the pulsed x-ray experimental apparatus which include normal incidence geometry and a high speed x-ray chopper that allows us to reduce the pulse repetition frequency of the synchrotron derived x-ray pulse train. The addition of the chopper allows us to measure ASETs that have long relaxation times. We show that ASETs can be generated through metallization on the LM124, and that for equivalent pulse energy incident on the part, the x-ray response from areas covered by metal (and inaccessible to the laser) are different than the x-ray response from areas with no metallization, i.e. “metal-free”. We use the laser pulses to generate ASETs at the same metal-free locations of x-ray induced ASETs. The shapes of the ASETs generated by the two methods are compared. We use the differences seen from the two generation methods to estimate the charge generation/collection produced by the pulsed x-rays and then estimate what LET this would correspond to for heavy ions. This work shows that pulsed x-rays can be used to characterize analog devices for single event effects.

Modeling and Investigations on TID-ASETs Synergistic Effect in LM124 Operational Amplifier From Three Different Manufacturers

The synergistic effect between Total Ionizing Dose (TID) and Analog Single Event Transient (ASET) in LM124 operational amplifiers (opamps) from three different manufacturers is investigated. This effect is clearly identified on only two manufacturers by three, highlighting manufacturer dependent. In fact, significant variations were observed on both the TID sensitivity and the ASET response of LM124 devices from different manufacturers. Hypotheses are made on the cause of the differences observed. A previously developed ASET simulation tool is used to model the transient response. The effects of TID on devices are taken into account in the model by injecting the variations of key electrical parameters obtained during Co60 irradiation. An excellent agreement is observed between the experimental responses and the model outputs, independently of the TID level, the bias configuration and the manufacturer of the device.

Correlation of Pulsed-Laser Energy and Heavy-Ion LET by Matching Analog SET Ensemble Signatures and Digital SET Thresholds

The quantitative correlation between the incident energy of a laser pulse and the Linear Energy Transfer (LET) of a heavy-ion beam is verified up to very high energy levels, by comparing the scatter plots of amplitude vs. duration of ensembles of Analog Single Event Transients (ASETs) generated with both methods in a complex CMOS RadHard Analog-to-Digital Converter (ADC). The same energy correlation is then confirmed in a more traditional way, by matching the onset energy thresholds of Digital SETs (DSETs) of a comparator-based voltage supervisor circuit. The observed dependency of the upset threshold on the circuit response time leads to a more general discussion of the influence that laser pulse-widths have on the SET sensitivity of mixed-signal circuits. Preliminary to this study, the energy of the laser apparatus at the Aeroflex facility was aligned to that of the NRL laser by comparing the transient shapes produced when a p-n photodiode, previously used for similar comparison purposes, was irradiated.

Investigation of Flip-Flop Effects in a Linear Analog Comparator-With-Hysteresis Circuit

The impact of the positive feedback loop on analog single event transient (ASET) shapes was investigated for a comparator-with-hysteresis circuit. Simulation based on previous developed ASET simulation tool is used to model the impact of the power supply voltage, the input voltage level and the injected energy. Simulation results show that these kinds of circuits are sensitive to flip-flop effects. This phenomenon occurs if the input voltage is in the hysteresis band range. In this case, simulations show that the ASET can latch the output into a non-desired state by changing the state of the circuit on his transfer characteristic curves. Laser experiments were conducted and show that the simulation outputs are in agreement with the experimental collected data.

An infrastructure for accurate characterization of single-event transients in digital circuits

We present the architecture and a detailed pre-fabrication analysis of a digital measurement ASIC facilitating long-term irradiation experiments of basic asynchronous circuits, which also demonstrates the suitability of the general approach for obtaining accurate radiation failure models developed in our FATAL project. Our ASIC design combines radiation targets like Muller C-elements and elastic pipelines as well as standard combinational gates and flip-flops with an elaborate on-chip measurement infrastructure. Major architectural challenges result from the fact that the latter must operate reliably under the same radiation conditions the target circuits are exposed to, without wasting precious die area for a rad-hard design. A measurement architecture based on multiple non-rad-hard counters is used, which we show to be resilient against double faults, as well as many triple and even higher-multiplicity faults. The design evaluation is done by means of comprehensive fault injection experiments, which are based on detailed Spice models of the target circuits in conjunction with a standard double-exponential current injection model for single-event transients (SET). To be as accurate as possible, the parameters of this current model have been aligned with results obtained from 3D device simulation models, which have in turn been validated and calibrated using micro-beam radiation experiments at the GSI in Darmstadt, Germany. For the latter, target circuits instrumented with high-speed sense amplifiers have been used for analog SET recording. Together with a probabilistic analysis of the sustainable particle flow rates, based on a detailed area analysis and experimental cross-section data, we can conclude that the proposed architecture will indeed sustain significant target hit rates, without exceeding the resilience bound of the measurement infrastructure.

Correlation of Dynamic Parameter Modification and ASET Sensitivity in a Shunt Voltage Reference

Analog Single Event Transients (ASETs) in two different shunt voltage references used in power management systems are investigated. Little has been published regarding how the dynamic parameter changes induced by external circuit design, such as time constant, damping coefficient or natural frequency affect ASET shapes. Modifications of the dynamic parameters of the circuit are measured by step response measurement. A correlation between dynamic parameters and ASET laser testing results is proposed. This study establishes the correlation between the dynamic parameters of a shunt voltage reference and ASET parameters such as pulse duration, and positive and negative amplitude.

Investigation and Mitigation of Analog SET on a Bandgap Reference in Triple-Well CMOS Using Pulsed Laser Techniques

The devices responsible for a 600-μs Analog Single-Event Transient (ASET) observed in an NPN Brokaw-cell type bandgap reference during heavy-ion irradiation are identified using pulsed laser techniques with two completely different experimental setups. The capability of focusing the beam to specific junctions provided by the lasers led to recognize a novel Long Duration Pulse (LDP) upset mechanism which, contrary to the conventional wisdom in the field, is promoted by heavy capacitive filtering applied to the circuit's output. A thorough comprehension of the cause of the LDP allowed for the proposal of design measures of mitigation that were implemented in silicon. Final tests performed with the same laser setup confirmed the successful resolution of such analog SET problem in this popular class of circuits.

Single-event Transients in OTA-C Analog Structures: A Case Study

This paper studies the effect of Analog Single-Event Transients (ASETs) in OTA-C structures. By adopting an ASET model previously reported and fully compatible with SPICE descriptions, a simulation campaign is carried out in an OTA-C low-pass Alter taken as a case study. The results of this campaign show that the structure of the circuit under study presents a high sensibility to ASETs. Consequently, the use of this circuit should be avoided in systems that operate in environments with heavy ions, unless techniques such as fault tolerance or radiation hardening were used. The study also identifies the most sensitive transistors that should be hardened in order to improve the behavior at the system level.

Demonstration of a Differential Layout Solution for Improved ASET Tolerance in CMOS A/MS Circuits

Layout techniques that exploit charge-sharing phenomena for analog single-event transient (ASET) mitigation in fully-differential analog/mixed-signal (A/MS) designs are experimentally explored in a 65 nm CMOS process. Benefits of the proposed RHBD layout techniques are illustrated through circuit simulations. Preliminary RHBD layout guidelines are discussed.

Development of a New Methodology to Model the Synergistic Effects Between TID and ASETs

A high level model is developed using circuit analysis to predict the synergy effect observed on a three stages operational amplifier. This model makes possible to explain and to predict the analog single event transients propagation in circuitry. The effect of total ionizing dose is taken into account by varying the model parameters using the monitoring of the usual supply current induced degradation of the operational amplifier.

Probabilistic Evaluation of Analog Single Event Transients

We propose a procedure to estimate the consequences of an analog single event transient (ASET). The method qualifies ASETs based on their frequency domain signatures and determines the probability of a single event transient induced error.

Frequency-domain analysis of analog single-event transients (ASETs) based on energy spectral density

We present an analysis of analog single-event transients (ASETs) in the frequency domain. Through an overall error energy defined here, a metric of part susceptibility and the impact on surrounding system components can be determined.

Investigation of millisecond-long analog single-event transients in the LM6144 op amp

A new category of analog single-event transients (SETs) with millisecond-long durations have been experimentally observed in the LM6144 operational amplifier. It is the first time that events with such extreme widths are under investigation in a linear integrated circuit. Relying on heavy-ion broadbeam tests, picosecond pulsed lasers diagnostics, and computer-assisted circuit modeling, we uncover the mechanisms and causes of these anomalous voltage transients. The identification of the problematic area of the IC reveals that the bias/startup circuitry is sensitive to energetic ionizing particles and can be responsible for corrupted circuit operations when subjected to a heavy-ion strike. A circuit hardening solution with minimal impact on the layout and the electrical performances of the op amp are proposed to mitigate this effect.

Frequency domain analysis of analog single-event transients in linear circuits

Using frequency-domain analysis techniques, a study of the relationship between the frequency spectrum of a single-event transient (SET) stimulus and the frequency response of internal circuit blocks of typical operational amplifier architectures has been performed. Results explain several general analog SET (ASET) observations, including the relative importance of the stimulus temporal profile, the circuit bandwidth, and the ion strike location relative to major circuit modules. Benefits gained from frequency compensation are evident, as important filtering of high-frequency signal components occur, reducing detrimental effects on the operation of the circuit.