Analog Electronic Circuits Research Articles

Supertransient Chaos in a Single and Coupled Liénard Systems.

We report the appearance of supertransient chaos in a single and two-coupled Liénard system with the influence of external periodic force. The existence of transient dynamics in a model is significantly long before it settles into the asymptotic steady state of periodic dynamics understood as supertransient chaos. The two diffusively coupled forced Liénard systems exhibit extremely long transient dynamics when their frequencies of the external forcing are slightly mismatched. Additionally, the coupled system signifies supertransient hyperchaotic dynamics for a specific set of system parameters. This study involves different numerical characterizations, statistical analysis, and hardware implementation using an analog electronic circuit.

Evaluation of Light-Induced Electroluminescence in Photovoltaic Field Applications

We present a performance analysis of the new measurement method Light-Induced Electroluminescence (LIEL) in a PV system. The LIEL method is applied to photovoltaic (PV) modules consisting of two PV module halves which are internally connected in parallel. Today’s main stream half-cell modules are constructed this way. To measure the electroluminescence of one half of the module, the other half is illuminated by an LED array. Our LIEL prototype system is a hood-based setup. It is equipped on one half with a LED array that is separated by a wall from the other half. This other half is observed by an InGaAs camera. We measure the impact of a LIEL hood misalignment to the electroluminescence intensity, the influence of the PV generator working point to the electroluminescence intensity and determine the measurement speed under realistic conditions. We show that the experimentally realized LIEL hood alignment to the PV modules is in 97.7% of the cases sufficient for acquiring high quality EL images. The LIEL system work with a switched off and on inverter. Under inverter on working condition the luminescence intensity is a function of the intensity of the sun. The effect of hood alignment and sun intensity on the luminescence intensity is successfully reproduced by an analogue electronic circuit simulation using LT Spice. The maximum measuring speed of a full module is in this study 12 s including the time for movement and alignment of the measurement hood from PV module to PV module

Wavelet-based digital pulse-shape method for discrimination between neutron and gamma-rays with organic scintillation detectors

Organic scintillator detectors are central instruments in many applications involving fast neutrons. Many organic scintillator detectors exhibit pulse-shape discrimination (PSD) properties and are widely used to discriminate between neutron events and background gamma rays. PSD methods have been traditionally implemented using analog electronic circuits; however, in recent years, digital techniques have proven to outperform analog methods in areas such as count rate capability. Many digital PSD algorithms with various levels of achievement have been proposed, and those based on the wavelet transform of digitized scintillation pulses have shown great promise for operation at high event rates, where the pulse pile-up effect limits the performance of PSD methods. However, the proposed wavelet-based PSD methods involve intricate calculations that limit their practical use. In this work, we describe a modified version of the wavelet-based PSD methods that offers significant simplification of the PSD process while still producing excellent PSD performance. The method employs the Haar wavelet transform, which is the simplest available wavelet function and is easily implemented on digital hardware, such as field-programmable gate arrays (FPGA). We describe the details of the method, and different aspects of its performance are experimentally demonstrated using an experimental setup comprising a NE213 liquid scintillation detector. A figure-of-merit (FOM) of 1.47 ± 0.07 is achieved with an energy threshold of 500 keVee (electron equivalent energy). An excellent FOM value (1.32) is achieved with a short pulse processing window of only 26 ns, indicating the resilience of the method against the pulse pile-up effect.

An Efficient Double Deep Q Learning Network-Based Soft Faults Detection and Localization in Analog Circuits

To identify whether the circuit under test is fault-free or faulty, fault diagnosis is conducted in an analog circuit. However, in the case of fault detection (FD) techniques, the size of FD is the main challenge in testing, especially for complex analog circuits. Hence to reduce the size of FD, specific test nodes are chosen to perform fault diagnosis from the available accessible test nodes. Specific test nodes are selected based on the faults classification efficiency of fault diagnosis. Therefore, this paper proposes an approach for single and multiple soft fault diagnosis using minimum test nodes in analog electronic circuits. The proposed double deep Q-learning-based hybrid Simulated annealing–Tabu search (DDQN-Hybrid SATS) technique determines minimum test nodes with the utilization of distance metric for fault classification. The DDQN-Hybrid SATS technique is used to identify minimum nodes for testing. In this, the double deep Q learning network (DDQN) ensures better reliability and faster convergence in learning but suffers from catastrophic forgetting issues. To prevent such issues, the DDQN approach is optimized using a hybrid SATS algorithm. The hybrid optimization of simulated annealing (SA) and Tabu search (TS) coalesce the advantages of individual optimization procedures to provide the optimum solution in a fast and effective way. The results for a fourth-order low pass filter are presented (i.e., first CUT) and an eight-bit digital to analog converter (i.e., second CUT). Moreover, the simulation experiment reveals that the proposed DDQN-Hybrid SATS technique achieves greater overall fault classification accuracy of about 96.25% than other compared techniques with minimum computation time.

DenRAM: neuromorphic dendritic architecture with RRAM for efficient temporal processing with delays

Neuroscience findings emphasize the role of dendritic branching in neocortical pyramidal neurons for non-linear computations and signal processing. Dendritic branches facilitate temporal feature detection via synaptic delays that enable coincidence detection (CD) mechanisms. Spiking neural networks highlight the significance of delays for spatio-temporal pattern recognition in feed-forward networks, eliminating the need for recurrent structures. Here, we introduce DenRAM, a novel analog electronic feed-forward spiking neural network with dendritic compartments. Utilizing 130 nm technology integrated with resistive RAM (RRAM), DenRAM incorporates both delays and synaptic weights. By configuring RRAMs to emulate bio-realistic delays and exploiting their heterogeneity, DenRAM mimics synaptic delays and efficiently performs CD for pattern recognition. Hardware-aware simulations on temporal benchmarks show DenRAM’s robustness against hardware noise, and its higher accuracy over recurrent networks. DenRAM advances temporal processing in neuromorphic computing, optimizes memory usage, and marks progress in low-power, real-time signal processing

АНАЛИЗ АНАЛОГОВЫХ АКТИВНЫХ ЭЛЕКТРОННЫХ СХЕМ НА ОСНОВЕ МЕТОДОВ МОДЕЛИРОВАНИЯ

Various classical methods are often used to analyze analog electronic circuits. It is proposed to use matrix methods of mathematical modeling, which allow using computational tools to obtain fast re-sults with acceptable accuracy. As an example, a scheme of an active second-order electronic filter based on an operational amplifier is proposed

АНАЛИЗ ГЕНЕРАТОРА ПРИ ПОМОЩИ ПРОГРАММЫ EVERYCIRCUIT

Various circuit modeling programs are often used to analyze analog electronic circuits. It is proposed to use the EveryCircuit program, which allows you to visually see potential changes in all the nodes of interest in the generator. As an example, a multivibrator circuit based on bipolar transistors is pro-posed

Fault detection in analog electronic circuits using fuzzy inference systems and particle swarm optimization

Fault detection in analog circuits is of great importance to predict the correct operation of the circuit. For this purpose, soft computing techniques such as those based on the application of fuzzy inference systems stand out. However, given the large variability that can exist in analog circuits due to component tolerance, the initial fuzzy inference system (FIS) may not be able to accurately diagnose the different hard faults. This study presents a methodology to diagnose and detect the faults that can occur in analog circuits, which is based on the development of a FIS, starting from a specific fault situation in the analog circuit, and subsequently on the optimization of the membership functions using an evolutionary algorithm so that the adjusted FIS can classify and predict different failure situations. To this end, the application of optimization techniques based on particle swarm optimization (PSO) will be analyzed to develop a FIS capable of predicting different faults. In addition, pattern search algorithm will also be analyzed. A Sallen-Key band-pass filter and a single stage of a small-signal amplifier are used as test circuits. The proposed methodology shows that it is possible to accurately predict the faults that could arise in the circuits under study.

Fully real-time configurable analogue implementation of continuous-time transfer function: Application on fractional controller

This paper proposes a new electronic analog circuit to realize real-time fully configurable continuous-time transfer function. The proposed circuit serves various purposes, including smart controllers, fractional-order controllers, optimal controllers, anti-aliasing filter, and programmable filters. The input signal of the transfer function is continuous and remains continuous throughout the circuit until the output signal is obtained. The proposed approach decomposes the transfer function into elementary first and/or second-order low-pass filters. A new analog first-order low-pass filter circuit is presented, offering advantages over conventional active first-order low-pass filters circuits. These benefits include DC gain and time constant independent of resistor ohmic values, enabling the use of smaller resistors and capacitors for low frequencies, and an expanded frequency working range. Similarly, a new analog circuit for a second-order low-pass filter is proposed, specifically used to obtain complex conjugate poles. The use of digital potentiometers and digital switches controlled by a micro-controller, makes this analog circuit configurable in real-time. As an application, the new circuit is used to realize fractional integrator controller. The circuit gives good similarity between theoretical and experimental measurements.

2D BDiode – A switchable bidirectional diode for analog electronic circuits fabricated entirely from 2D materials

The advent of two-dimensional (2D) materials has led to innovative and compact electronic devices with remarkable properties. In this work, we introduce a switchable bidirectional diode (2D BDiode), fabricated entirely using different 2D materials, that serves as a fundamental building block for various analog circuit applications. This proof-of-concept diode exhibits the ability to control the flow of current in both forward and reverse bias configurations, enabling advanced functionality in the realm of analog circuit design. We provide a SPICE-based model for the diode based on current-voltage device characterization, capturing its behavior under different biasing conditions, and finally demonstrate a few potential use cases of the 2D BDiode including AC/DC conversion, DC/AC conversion and charge pump circuits.

Diagnosis of Analog Circuits: The Problem of Ambiguity of Test Equation Solutions

Diagnosis of analog electronic circuits is a crucial issue in computer-aided design. During the diagnosis, solving a test equation to identify the values of faulty parameters is usually necessary. The equation is nonlinear to the parameters, even for linear circuits. The nonlinearity of the equation implies the possibility of multiple solutions. No method exists that guarantees the determination of all the solutions of the test equation. However, even information about more than one existing solution is essential for the designer. It allows for the selection of another test at the design step and helps to obtain an unambiguous solution during the diagnosis. Information about the possibility of additional solutions is essential for simulation after test methods (e.g., identification and verification methods) and for simulation before test methods, so-called dictionary methods, especially those targeting multiple fault classification. The paper deals with the problem of multiple solutions of the test equation for nonlinear DC circuits and proposes a method for identifying the solutions using a deflation technique. The outcomes are compared with the results obtained using standard and adaptively damped Newton–Raphson iterative methods. The methods use randomly selected initial guesses to find multiple solutions. The effectiveness of all the methods for identifying multiple solutions was verified numerically and via laboratory tests.

Practical electronic maintenance and repair technique to support sustainability development

Electronic Maintenance and Repair is fundamentally a combination of theoretical and practical learning to support higher education in the vocational or polytechnic specialization. This material is outlined in a course by conducting experiments with existing problems with objects that are students in practicum classes. In this practice, it is explained about the specifications, damage, ways of measuring and diagnosing damage based on the Project Based Learning (PBL) method. All Standard Operating Procedure (SOP) are explained in Job Safety Analysis (JSA) and Job Safety Operation (JSO) followed by different circuits and work steps for each electronic circuit. In actual fact, after this method is applied, students can determine and make specifications for an electronic equipment/system, understand and also complete calculations about reliability and failure in electronic systems. One more thing is to recognize damage and how to measure electronic components both passive and active. It is also explaining work principles and looking for damage to a simple digital and analog electronic circuit. In the process, this method experiments with various circuits by measuring normal conditions and damage according to the given switch. The entire measurement method is performed through the specified testing point thereby analysis can be implemented based on the comparison of measurement results under normal conditions and damage. Based on the results of data and analysis of student response results aspects of PBL can be applied to tackle and solve the problems diagnosed by damaged conditions of the circuits. It can be used as MR Electronics practicum to gain and collaborate based on theory and data analysis.

Noise-induced chaos in an electronic Burridge-Knopoff model analog

Electronic analog circuits are valuable platforms to experimentally address physical systems whose implementation would otherwise be unwieldy. Besides validating numerical predictions, electronic analogs of nonlinear systems are also ideal tools to study the effect of noise injection in realistic conditions and are often more scalable than numerical approaches. In this work, we address the effect of noise injection in an electronic analog of the Burridge-Knopoff mechanical model of earthquake faults. Noise is injected into the friction term of the mechanical system: interestingly, the presence of a sufficient level of noise can trigger the onset of chaos in otherwise periodic regimes.

LOW-COST PHOTOVOLTAIC EMULATOR WITH A HIGH-DYNAMIC RESPONSE FOR SMALL SATELLITE APPLICATIONS

In recent years, growing interest from academic institutions and emerging countries in small satellite missions has led to a need for photovoltaic emulators (PVEs) during subsystem testing. Unfortunately, the market lacks suitable PVEs with adequate power and characteristics for these applications. To fill this gap, this proposal introduces a low-cost, flexible, and high-dynamic response PVE for testing small satellite subsystems. The proposed PVE includes an analog electronic circuit that amplifies the reference current-voltage (I-V) curve from a space reference solar cell. It is characterized by accurate amplification of solar cell curves under various conditions, achieving a maximum output power of 124 W. This capability enables assessment under diverse space application scenarios with rapidly changing climatic conditions. The emulator's remarkable flexibility is demonstrated through the use of various solar cell technologies for space applications as references. Experimental results effectively confirm the practical feasibility of the proposed PVE.

New Class of Discrete-Time Memristor Circuits: First Integrals, Coexisting Attractors and Bifurcations Without Parameters

The use of ideal memristors in a continuous-time (CT) nonlinear circuit is known to greatly enrich the dynamic behavior with respect to the memristorless counterpart, which is a crucial property for applications in future analog electronic circuits. This can be explained via the flux–charge analysis method (FCAM), according to which CT circuits with ideal memristors have for structural reasons first integrals (or invariants of motion, or conserved quantities) and their state space can be foliated in infinitely many invariant manifolds where they can display different dynamics. The paper introduces a new discretization scheme for the memristor which, differently from those adopted in the literature, guarantees that the first integrals of the CT memristor circuits are preserved exactly in the discretization, and that this is true for any step size. This new scheme makes it possible to extend FCAM to discrete-time (DT) memristor circuits and rigorously show the existence of invariant manifolds and infinitely many coexisting attractors (extreme multistability). Moreover, the paper addresses standard bifurcations varying the discretization step size and also bifurcations without parameters, i.e. bifurcations due to varying the initial conditions for fixed step size and circuit parameters. The method is illustrated by analyzing the dynamics and flip bifurcations with and without parameters in a DT memristor–capacitor circuit and the Poincaré–Andronov–Hopf bifurcation in a DT Murali–Lakshmanan–Chua circuit with a memristor. Simulations are also provided to illustrate bifurcations in a higher-order DT memristor Chua’s circuit. The results in the paper show that DT memristor circuits obtained with the proposed discretization scheme are able to display even richer dynamics and bifurcations than their CT counterparts, due to the coexistence of infinitely many attractors and the possibility to use the discretization step as a parameter without destroying the foliation in invariant manifolds.

Scroll-growing/controlling chaotic attractors in cyclic Hopfield neural networks via memristive bridging

In this paper, a memristor-based neural network is proposed, which is implemented by two tri-neuron resistive-cyclic Hopfield neural networks (RC-HNNs) via memristive bridging. The memristor-bridged network has a line equilibrium set composed of infinitely many index-2 saddle-foci, but it can produce multi-scroll chaotic attractors contrary to Shil’nikov’s criterion. Complex bifurcation behaviors, scroll-growing chaotic attractors over time, and homogeneous coexisting attractors are revealed by numerical methods. Further, a scroll-control scheme is designed and scroll-controlling chaotic attractors are demonstrated numerically. The results show that the memristor-bridged network can not only generate scroll-growing chaotic attractors over time, but also produce scroll-controlling chaotic attractors by limiting the dynamic range of the internal state of the bridging memristor. Finally, an analog electronic circuit is designed for the memristor-bridged network, and PSIM circuit simulations are used to verify the numerical simulations.

Fuzzy Sampled-Data Stabilization of Hidden Oscillations in a Memristor-Based Dynamical System

In the manuscript, we report the dynamics of the Takagi–Sugeno (T–S) fuzzy memristor-based hidden system via sampled-data control. For an open-loop formulation, the system dynamics are studied. We found extreme events, hidden attractors, and trivial period doubling scenarios and confirmed them through numerical, analytical, statistical and experimental analyses. Furthermore, to enable stability analysis and control combination, the (T–S) fuzzy algorithm is employed to control the dynamics of a nonlinear system. First, we designed the sampled data fuzzy controller (SDFC) for the proposed system. Second, the Lyapunov–Krasovskii functional (LKF) strategy, novel integral inequality mechanisms, and certain sufficient conditions are determined by deriving the linear matrix inequalities (LMIs), which ensure the asymptotic stability of the system. Moreover, the sampled data control gains are computed for the large sampling interval, and numerically obtained results confirm the theoretical results. Additionally, a simple real-time analog electronic circuit is constructed, and experimental data is obtained, and finally, numerically simulated results were verified through MATLAB.

Design and Implementation of Self-Limiting Two-Stage LC Oscillators Using Cascade Structure of Monolithic CCIIs as Active Elements

This paper presents the structure and principle of operation of two circuit configurations of self-limiting LC oscillators using monolithic positive second-generation current conveyors (CCII+s), that are implemented using Current-Feedback Operational Amplifiers (CFOAs) with an available compensation pin (Z). The proposed LC oscillators are synthesized using a systematic approach in the design of analog electronic circuits and can be considered as variants of the basic three-point oscillators, implemented using transistors (BJTs or FETs). Based on the analysis of the structure and electrical parameters of the CFOAs with a compensation pin (Z), electronic circuits of oscillators with two-stage amplifier blocks are synthesized. The characteristic equations and self-oscillation conditions are derived for the obtained analog circuits, and recommendations for designing circuits with arbitrary frequencies are defined. To verify the efficiency of the proposed LC oscillators, an experimental study is performed in the frequency range from 100 kHz to 10 MHz. The CFOAs AD844A with an external terminal z of the internal current conveyor are used as active elements. The obtained experimental results well match the results of the simulation modelling and the parameters based on the derived analytical expressions. The developed LC oscillators are intended to be used in schematic configurations of gas sensors based on surface acoustic wave (SAW) resonators.

Introduction to the Digitization of Seismic Data: A User’s Guide

Abstract Modern seismic data are collected, distributed, and analyzed using digital formats, and this has become a standard for the field. Although most modern seismometers still make use of analog electronic circuits, their data are converted from an analog voltage output to time-tagged counts by way of digitization. Although much of the digitization process is not complicated to conceptualize, there is a fair bit of jargon in digitizer specifications, and a few pitfalls that can arise in the processes of recording and analyzing ground-motion data. In this article, we review some of the fundamental physical properties of data acquisition systems and the basic steps in digitizing data from an analog instrument (specifically a seismometer). We then briefly discuss the digitization process and some of the key properties needed to make these data useful for seismological applications. Finally, we discuss some of the filtering processes that naturally arise from digitization and how it can affect the processing workflow. The end goal is to provide a user guide that will enable seismologists to have a working knowledge of the digitization process. We focus on aspects central to seismological applications and have tried to avoid getting bogged down in signal processing formalism.

Bifurcation, chaos and fixed-time synchronization of memristor cellular neural networks

This study investigates a novel chaotic memristive cellular neural network (CNN) and its synchronization. Firstly, a fourth-order chaotic system with a memristor is established by introducing a CNN and a memristor model. Secondly, the dynamic behavior of the system is analyzed, including its stability, bifurcation, and chaotic attractors. In particular, Hopf bifurcations are investigated in detail. Furthermore, the effects of the memristor’s parameters and initial state on the dynamic behavior of the system are discussed. The conclusions are verified through the use of Lyapunov exponents and bifurcation diagrams. Additionally, the study examines the multistability that arises in memristive CNNs. Moreover, an analog electronic circuit is developed by creating appropriate system parameters to confirm the presence of chaotic attractors. Thirdly, fixed-time synchronization of memristor-based chaotic CNNs is achieved through the use of sliding mode control method. A stability criterion of error system is proposed, and the results are verified through simulation