Amorphous Indium Gallium Zinc Oxide Research Articles

Enlightenment of Deionized‐Water Bathing IGZO TFTs

AbstractAt present, amorphous indium–gallium–zinc oxide (IGZO) semiconductor has become the most commonly used semiconductor material and is widely used in flat panel displays and various sensors, but its performance is greatly affected by environmental factors, especially water. This study investigates the instability of IGZO thin‐film transistors (TFTs) soaked in deionized water. After 24 h bathing, the field‐effect mobility and threshold voltage change a little, but the subthreshold swing, positive bias stress and negative bias stress stability undergo clear degradation. Through comprehensive examination of the changes in the chemical composition, surface morphology and thickness of the IGZO films, it's found that IGZO experiences selective etching by deionized water, and consequently the film surface becomes rough and rich of In and oxygen vacancies, which can explain the variations on device performance well. In addition to the bathing experiment performed on In2O3, Ga2O3, and ZnO TFTs, a schematic image of the reaction between water and IGZO is depicted, showing the preferential loss of Ga and Zn located next to the oxygen vacancy.

A Physical TCAD Mobility Model of Amorphous In-Ga-Zn-O (a-IGZO) Devices with Spatially Varying Mobility Edges, Band-Tails, and Enhanced Low-Temperature Convergence.

Amorphous indium gallium zinc oxide (a-IGZO) is becoming an increasingly important technological material. Transport in this material is conceptualized as the heavy disorder of the material causing a conduction or mobility band-edge that randomly varies and undulates in space across the entire system. Thus, transport is envisioned as being dominated by percolation physics as carriers traverse this varying band-edge landscape of "hills" and "valleys". It is then something of a missed opportunity to model such a system using only a compact approach-despite this being the primary focus of the existing literature-as such a system can easily be faithfully reproduced as a true microscopic TCAD model with a real physically varying potential. Thus, in this work, we develop such a "microscopic" TCAD model of a-IGZO and detail a number of key aspects of its implementation. We then demonstrate that it can accurately reproduce experimental results and consider the issue of the addition of non-conducting band-tail states in a numerically efficient manner. Finally, two short studies of 3D effects are undertaken to illustrate the utility of the model: specifically, the cases of variation effects as a function of device size and as a function of surface roughness scattering.

CMP characteristics of IGZO thin film with a variety of process parameters

Recently, amorphous indium gallium zinc oxide (a-IGZO) has been studied in the field of 3D transistors as a channel material for high mobility, good uniformity, and low leakage current performance. The CMP process needs to be applied to fully remove surface IGZO in a multilayer film stack structure and achieve the purpose of planarization. As we all know, the CMP characteristics of the desired removal rate with stability and within-wafer non-uniformity (WIWNU%) play an important role in the CMP process. In this paper, the variation of the removal rate and the non-uniformity for IGZO thin film were studied with various process parameters (such as polishing time, slurry flow rate, slurry dilution, head pressure, head and table speed). The results mean that the removal rate and the non-uniformity of IGZO thin film can be tuned by changing process parameters, which can enhance the confidence about the feasibility of IGZO-CMP in the application of advanced technology.

97‐3: Late‐News Paper: Enhanced IGZO TFT Performance with Atomic Layer Deposition Parameter Optimization for Large OLED Displays

In this comprehensive study, we rigorously evaluated the applicability of amorphous indium gallium zinc oxide (a‐IGZO) thin films synthesized using atomic layer deposition (ALD) technology in the field of large‐area organic light‐emitting diode (OLED) TVs. The key term to display production is the distribution of device characteristics, and maintaining uniformity can improve productivity yield and product quality. The purpose of this paper is to present guidelines for early application in industry through the process variable exploration results of ALD deposition equipment. The process parameters studied are process pressure and oxygen partial pressure (PO2). We have secured a method to secure device characteristics suitable for display technology through the correlation between a‐IGZO thin film characteristics and device characteristics through corresponding parameters. Our empirical data strongly demonstrate that the threshold voltage (Vth) stabilizes near 0.0 V and consistently achieves device mobility exceeding 15 cm2/Vs. In particular, this study shows that the variability of the Vth characteristic, which is limited to a narrow range of less than ±0.1V, is greatly reduced, and the mobility dispersion is also greatly reduced to less than ±1cm2/Vs. A deeper analytical exploration revealed that the pivotal factors affecting device performance are closely related to oxygen vacancies (Vo) and their dynamic interactions with oxygen molecules. These results will improve the uniformity of device characteristics, and it is believed that the introduction of ALD technology into future display technology will demonstrate improvements in the performance and quality of display products.

Specific contact resistivity reduction in amorphous IGZO thin-film transistors through a TiN/IGTO heterogeneous interlayer

Oxide semiconductors have gained significant attention in electronic device industry due to their high potential for emerging thin-film transistor (TFT) applications. However, electrical contact properties such as specific contact resistivity (ρC) and width-normalized contact resistance (RCW) are significantly inferior in oxide TFTs compared to conventional silicon metal oxide semiconductor field-effect transistors. In this study, a multi-stack interlayer (IL) consisting of titanium nitride (TiN) and indium-gallium-tin-oxide (IGTO) is inserted between source/drain electrodes and amorphous indium-gallium-zinc-oxide (IGZO). The TiN is introduced to increase conductivity of the underlying layer, while IGTO acts as an n+-layer. Our findings reveal IGTO thickness (tIGTO)-dependent electrical contact properties of IGZO TFT, where ρC and RCW decrease as tIGTO increases to 8 nm. However, at tIGTO > 8 nm, they increase mainly due to IGTO crystallization-induced contact interface aggravation. Consequently, the IGZO TFTs with a TiN/IGTO (3/8 nm) IL reveal the lowest ρC and RCW of 9.0 × 10−6 Ω·cm2 and 0.7 Ω·cm, significantly lower than 8.0 × 10−4 Ω·cm2 and 6.9 Ω·cm in the TFTs without the IL, respectively. This improved electrical contact properties increases field-effect mobility from 39.9 to 45.0 cm2/Vs. This study demonstrates the effectiveness of this multi-stack IL approach in oxide TFTs.

Multi-project wafers for flexible thin-film electronics by independent foundries

Flexible and large-area electronics rely on thin-film transistors (TFTs) to make displays1–3, large-area image sensors4–6, microprocessors7–11, wearable healthcare patches12–15, digital microfluidics16,17 and more. Although silicon-based complementary metal–oxide–semiconductor (CMOS) chips are manufactured using several dies on a single wafer and the multi-project wafer concept enables the aggregation of various CMOS chip designs within the same die, TFT fabrication is currently lacking a fully verified, universal design approach. This increases the cost and complexity of manufacturing TFT-based flexible electronics, slowing down their integration into more mature applications and limiting the design complexity achievable by foundries. Here we show a stable and high-yield TFT platform for the fabless manufacturing of two mainstream TFT technologies, wafer-based amorphous indium–gallium–zinc oxide and panel-based low-temperature polycrystalline silicon, two key TFT technologies applicable to flexible substrates. We have designed the iconic 6502 microprocessor in both technologies as a use case to demonstrate and expand the multi-project wafer approach. Enabling the foundry model for TFTs, as an analogy of silicon CMOS technologies, can accelerate the growth and development of applications and technologies based on these devices.

A ternary gate-connected threshold switching thin-film transistor

Multi-valued logic has been a significant focus of research in various fields with the advancement of information technology. One approach to realizing ternary logic is integrating of a threshold switching (TS) device with a transistor, but this method often entails a complex fabrication process. This work suggests a ternary gate-connected threshold switching thin-film transistor (TS-TFT) by serially connecting the TS device with a bottom-gate thin-film transistor (TFT). The fabrication process is simplified with a structure that shares electrodes and insulators. Different threshold voltages from TS and TFT devices produce stable multiple states. The Pt/HfO2/TiN TS device has an electronic trapping/detrapping switching mechanism that exhibits low power consumption and high reliability. With the superior electrical performance of an amorphous indium gallium zinc oxide TFT, the TS-TFT has stable endurance. Furthermore, pulse switching and ternary inverter are demonstrated from the practical point of view.

Strengthening Multi-Factor Authentication Through Physically Unclonable Functions in PVDF-HFP-Phase-Dependent a-IGZO Thin-Film Transistors.

For enhanced security in hardware-based security devices, it is essential to extract various independent characteristics from a single device to generate multiple keys based on specific values. Additionally, the secure destruction of authentication information is crucial for the integrity of the data. Doped amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFTs) using poly(vinylidene fluoride-co-hexafluoropropylene) (PVDF-HFP) induce a dipole doping effect through a phase-transition process, creating physically unclonable function (PUF) devices for secure user information protection. The PUF security key, generated at VGS = 20V in a 20×10 grid, demonstrates uniformity of 42% and inter-Hamming distance (inter-HD) of 49.79% in the β-phase of PVDF-HFP. However, in the γ-phase, the uniformity drops to 22.5%, and inter-HD decreases to 35.74%, indicating potential security key destruction during the phase transition. To enhance security, a multi-factor authentication (MFA) system is integrated, utilizing five security keys extracted from various TFT parameters. The security keys from turn-on voltage (VON), VGS = 20V, VGS = 30V, mobility, and threshold voltage (Vth) exhibit near-ideal uniformities and inter-HDs, with the highest values of 58% and 51.68%, respectively. The dual security system, combining phase transition and MFA, establishes a robust protection mechanism for privacy-sensitive user information.

Effect of sputtering working pressure on the reliability and performance of amorphous indium gallium zinc oxide thin film transistors

In this study, the reliability and electrical properties of indium gallium zinc oxide (IGZO) thin film transistors (TFTs) are investigated when the working pressure of the sputtering system is varied. As IGZO is deposited at a low working pressure, the sputtering yield increases and the film density increases from 5.84 to 6.00 g/cm3 based on x-ray reflectivity measurements. IGZO TFT sputtered at low working pressure has a mobility of 8.05 cm2/V s, a threshold voltage of 1.25 V, and a subthreshold swing of 0.25 V/dec. In addition, x-ray photoelectron spectroscopy analysis shows that the oxygen content in the film decreases when IGZO is deposited at a low working pressure, resulting in improved positive bias stress reliability due to the oxygen-poor film. Furthermore, the IGZO film deposited at a low working pressure effectively prevents the formation of defects caused by the environment such as H2O molecules.

Design and simulation of a nano biosensor based on amorphous indium gallium zinc oxide (a-IGZO) thin film transistor

In this study, a biosensor utilizing a dielectric-modulated amorphous indium gallium zinc oxide (a-IGZO) thin film transistor (TFT) is introduced. TFT biosensors have garnered significant attention due to their heightened sensitivity, scalable nature, low power consumption, rapid electrical detection capabilities, and cost-effective means of mass production. By embedding a nano-cavity within the gate insulator of the TFT, biomolecules can accumulate within. As each biomolecule possesses its own dielectric constant, it modulates the effective gate capacitance and, subsequently, changes the channel conductance. To assess the sensitivity of the biosensor, variation in saturation current after the absorption of biomolecules with respect to the drain current in the case of an air-filled cavity has been considered as a precise measure. The efficient operation of a biosensor is contingent upon the sensitivity being highly dependent on the dielectric constant of the biomolecules that are accumulated within the nano-cavity. Consequently, a comprehensive evaluation has been conducted to ascertain the impact of critical design parameters which have the potential to affect the sensitivity of the biosensor. Additionally, a statistical analysis based on coefficient of variation measure has been performed to evaluate the susceptibility of the biosensor’s sensitivity to variations in geometrical and physical design parameters. The utilization of label-free detection methodology in this device presents a notable advantage due to its compatibility with the fundamental CMOS processing technology and its cost-effective potential for macro production.

Visualization of Mesoscopic Conductivity Fluctuations in Amorphous Semiconductor Thin-Film Transistors.

Charge transport in amorphous semiconductors is considerably more complicated than the process in crystalline materials due to abundant localized states. In addition to device-scale characterization, spatially resolved measurements are important to unveiling electronic properties. Here, we report gigahertz conductivity mapping in amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors by microwave impedance microscopy (MIM), which probes conductivity without Schottky barrier's influence. The difference between the dc and microwave conductivities reflects the efficacy of the injection barrier in an accumulation-mode transistor. The conductivity exhibits significant nanoscale inhomogeneity in the subthreshold regime, presumably due to trapping and release from localized states. The characteristic length scale of local fluctuations, as determined by the autocorrelation analysis, is about 200 nm. Using a random-barrier model, we can simulate the spatial variation of the potential landscape, which underlies the mesoscopic conductivity distribution. Our work provides an intuitive way to understand the charge transport mechanism in amorphous semiconductors at the microscopic level.

Paper‐Based Lead Sulfide Quantum Dot Heterojunction Photodetectors

AbstractPaper‐based photodetectors have emerged as reliable candidates for wearable electronics due to their low‐cost, degradability and excellent bending properties. However, the application of quantum dots (QDs) to paper‐based devices remains a challenge due to the low carrier mobility. In this work, lead sulfide (PbS) QDs are successfully applied to paper‐based devices by constructing the amorphous indium gallium zinc oxide (a‐IGZO)/PbS QDs‐EDT heterojunction to enhance the photoconductive gain of the QDs film. The effect of different paper substrates are investigated on device performance and demonstrate that the heterojunction is not suitable for the fiber‐like paper substrate. Heterojunction devices based on Senyan paper and glass paper exhibit stable detection performance with detectivity of 1.71 × 1010 and 3.19 × 1011 Jones, respectively. Benefit from the unique micro‐morphology, the Senyan paper‐based device exhibits excellent bending resistance and remained stable after 1000 bends.

PEALD deposited aluminum hafnium mixed oxide dielectrics for amorphous-IGZO TFTs

(Al–Hf) mixed oxide thin films (HfAlO) are attracted by many researchers because of their outstanding optical and electrical properties compared to hafnium oxide (HfO2). This study prepared HfAlO films at 300 °C using plasma-enhanced atomic layer deposition (PEALD). Changing the cycle ratio of HfO2 and aluminum oxide (Al2O3), the mixing effect on the properties of HfAlO film was studied. The characterization of the HfAlO films was investigated using spectroscopic ellipsometry (SE), X-ray diffraction (XRD), X-ray photoelectron spectroscopy (XPS), X-ray reflectivity (XRR), scanning electron microscopy (SEM), and UV–vis spectroscopy. The results show that the aluminum content and optical bandgap of the HfAlO films increased with the increase of the Al2O3 cycle ratio. The dielectric constant of the HfAlO film with a 20 % Al2O3 cycle ratio (cycles of Al2O3/(cycles of Al2O3 + cycles of HfO2)) reaches ∼ 26, and the breakdown electric field is about 6.5 MV/cm. Pure HfO2 and 20 % Al2O3 cycle ratio deposited HfAlO was used as the gate dielectric layer, and the influence on the performance of amorphous indium gallium zinc oxide (a-IGZO) thin film transistor (TFT) was studied. A-IGZO TFT with a 20 % Al2O3 cycle ratio mixed HfAlO film as the gate dielectric exhibits the best performance, showing a high Ion/Ioff ratio of 1.3 × 109, a saturation mobility of ∼5.8 cm2/Vs, a subthreshold slope of 88 mV per decade and a low threshold voltage of −0.1V.

Inkjet printing cellulose nanofibril/PVA hybrid dielectrics for large hysteresis and high-performance a-IGZO synaptic transistors

Inkjet printing green nanomaterials for high-performance synaptic transistors is a hot research topic in academic communities. However, it remains challenging to develop printable and sustainable dielectric inks for the devices with desirable properties of nonvolatile behavior and large hysteresis, which are the basis for emulating controllable weight update in neuron computing. To address this challenge, we present a solution by fabricating a biodegradable cellulose nanofibril (CNF) dielectric film through inkjet printing, which serves as the source of hysteresis in amorphous indium–gallium–zinc oxide (a-IGZO) synaptic transistors. By employing suitable additives and meticulously engineered microfluidic flows, we have successfully achieved the high-quality CNF/polyvinyl alcohol (PVA) composite electrolyte films by inkjet-printing. This accomplishment has enabled the emulation of excellent synaptic functionalities, including short-term to long-term potentiation/depression, as well as the implementation of a nearly symmetric and linear weight update protocol. This work holds significant promise in advancing the development of cost-effective and environmentally friendly synaptic electronics.

Role of interface engineering in amorphous InGaZnO ETL for non-fullerene organic solar cells

Amorphous metal-oxide semiconductors have been developed as prospective substitutes for organic and silicon compounds, and their applications have been expanded due to their superior mobility in amorphous phase. As a result, this study demonstrated a facile approach to amend the interface quality by oxygen vacancy engineering. Here, we compared the performance of optimized oxygen-deficient (Od) and oxygen-rich (Or) amorphous indium–gallium–zinc oxide (a-IGZO) electron transport layers (ETL) for non-fullerene organic solar cells (OSCs). The ETL was fabricated using rf magnetron sputtering by changing oxygen contents. The power conversion efficiency (PCE) of Or device is 5.1 %, which was boosted to 6.6 % for Od device. The device with Od a-IGZO ETL outperforms the Or device, as the oxygen vacancies in Od device aid as electron donors, which deliver free electron carriers to IGZO film. These free electron carriers promote electron concentration, device mobility and deteriorate the resistivity, which facilitate charge transport and collection towards the electrode. Furthermore, devices improved their stability, as device with Od a-IGZO ETL retained almost 80 % of its initial PCE in ambient conditions. Consequently, interfacial engineering has played a crucial role in bringing OSC towards commercialization as it has substantial influence on charge collection and transport properties in devices.

Rapid thermal annealing effect on performance variations of solution processed indium–gallium–zinc-oxide thin-film transistors

In this paper, the 1 min annealing effect on the electrical characteristics of solution-processed amorphous indium–gallium–zinc-oxide thin-film transistors (a-IGZO TFTs) was analyzed in an ambient gas environment comprising He, Ar, N2, and O2 and an annealing temperature range from 400 to 600 °C for different active layer thicknesses. Even for the short annealing time of 1 min, the He-annealed TFTs show good performance with a threshold voltage of −1.27 V, a subthreshold slope of 605 mV/dec, and a field-effect mobility of 7.19 cm2/Vs under the thick active layer condition. The resulting good performance of the He-annealed TFT originates from the high thermal velocity of the He atom, which can be confirmed from the x-ray photoelectron spectroscopic measurement by the sharp definition of the active layer near the a-IGZO/gate insulator interface.

A Comprehensive Large Signal, Small Signal, and Noise Model for IGZO Thin Film Transistor Circuits.

We report a new physics-based model for dual-gate amorphous-indium gallium zinc oxide (a-IGZO) thin film transistors (TFTs) which we developed and fine-tuned through experimental implementation and benchtop characterization. We fabricated and characterized a variety of test patterns, including a-IGZO TFTs with varying gate widths (100-1000 μm) and channel lengths (5-50 μm), transmission-line-measurement patterns and ground-signal-ground (GSG) radio frequency (RF) patterns. We modeled the contact resistance as a function of bias, channel area, and temperature, and captured all operating regimes, used physics-based modeling adjusted for empirical data to capture the TFT characteristics including ambipolar subthreshold currents, graded interbias-regime current changes, threshold and flat-band voltages, the interface trap density, the gate leakage currents, the noise, and the relevant small signal parameters. To design high-precision circuits for biosensing, we validated the dc, small signal, and noise characteristics of the model. We simulated and fabricated a two-stage common source amplifier circuit with a common drain output buffer and compared the measured and simulated gain and phase performance, finding an excellent fit over a frequency range spanning 10 kHz-10 MHz.

Room temperature-grown highly oriented p-type nanocrystalline tellurium thin-films transistors for large-scale CMOS circuits

Although facile fabrication of high-performance thin-film transistor (TFT)-based complementary metal oxide–semiconductor (CMOS) circuits over a large area has generated significant interest, the lack of reliable and uniform p-type TFTs is hindering it. In this study, we prepared high-performance CMOS circuits using room temperature deposited nanocrystalline tellurium (nc-Te) and sputtered amorphous-indium gallium zinc oxide (a-IGZO) TFTs. The facile polyethyleneimine (PEI) surface treatment enabled Te atom anchoring and crystal orientation control along with continuous surface coverage, resulting in a high-performance TFT with an average mobility of 21.1 cm2V−1s−1 and an Ion/Ioff ratio of 104. By introducing monolithic integration of nc-Te and a-IGZO TFTs, various CMOS circuits including inverter, NAND, and NOR circuits were fabricated and operated quite logically. Moreover, seven-stage ring oscillators comprising 14 cross-wired TFTs validated the cascading of multiple stages and device uniformity of the complementary system, achieving an oscillation frequency up to 392.16 kHz at VDD of 20 V. nc-Te on a PEI-treated surface offers a general route to producing high-performance and stable p-type semiconductors while ensuring compatibility with standard CMOS processing and large-scale on-chip device applications.

Interface-Engineered Organic Near-Infrared Photodetector for Imaging Applications.

We report a high-speed low dark current near-infrared (NIR) organic photodetector (OPD) on a silicon substrate with amorphous indium gallium zinc oxide (a-IGZO) as the electron transport layer (ETL). In-depth understanding of the origin of dark current is obtained using an elaborate set of characterization techniques, including temperature-dependent current-voltage measurements, current-based deep-level transient spectroscopy (Q-DLTS), and transient photovoltage decay measurements. These characterization results are complemented by energy band structures deduced from ultraviolet photoelectron spectroscopy. The presence of trap states and a strong dependency of activation energy on the applied reverse bias voltage point to a dark current mechanism based on trap-assisted field-enhanced thermal emission (Poole-Frenkel emission). We significantly reduce this emission by introducing a thin interfacial layer between the donor: acceptor blend and the a-IGZO ETL and obtain a dark current as low as 125 pA/cm2 at an applied reverse bias of -1 V. Thanks to the use of high-mobility metal-oxide transport layers, a fast photo response time of 639 ns (rise) and 1497 ns (fall) is achieved, which, to the best of our knowledge, is among the fastest reported for NIR OPDs. Finally, we present an imager integrating the NIR OPD on a complementary metal oxide semiconductor read-out circuit, demonstrating the significance of the improved dark current characteristics in capturing high-quality sample images with this technology.

62‐1: Distinguished Student Paper: Ultraviolet Photodetectors and Readout Based on a‐IGZO Semiconductor Technology

In this work real‐time ultraviolet photodetectors are realized through metal‐semiconductor‐metal (MSM) structures. Amorphous indium gallium zinc oxide (a‐IGZO) is used as semiconductor material and gold as metal electrodes. The readout of an individual sensor is implemented by a transimpedance amplifier (TIA) consisting of an allenhancement a‐IGZO thin film transistor (TFT) operational amplifier and a switched capacitor (SC) as feedback resistance. The photosensor and the transimpedance amplifier are both manufactured on glass substrates. The measured photosensor possesses a high responsivity R, a low response time tRES and a good noise equivalent power value NEP.