All-optical Header Processing Research Articles

Design of 2-to-4 All-Optical Decoder with the Help of Terahertz Optical Asymmetric Demultiplexer

An all-optical 2-to-4 decoder unit with the assist of terahertz optical asymmetric demultiplexer (TOAD) is presented. The all-optical 2-to-4 decoder with a set of all-optical switches is designed which can be used to achieve a high-speed central processor unit using optical hardware. The unique output lines can be used for all-optical header processing. We attempt to develop an integrated all-optical circuit which can perform decoding of signal. This scheme is very simple and flexible for performing different logic operation and to design advanced complex logic. Simulated results are confirming the described methods.

A novel scheme of all optical header extraction for optical packet switching network

A novel scheme of all optical header extraction using a semiconductor optical amplifier-Mach-Zehnder-Interferometer with asymmetric control light is proposed for optical packet switching with all-optical header processing at a header rate of 20 Gb/s and payload rate of 80 Gb/s in this article. The scheme parameters are discussed and analyzed to optimize the performance of optical header extraction with the proposed scheme. Numerical analysis and simulation show that a more than 17 dB contrast ratio can be achieved for the optical header separation when the input optical signal energy is as low as 0.2 pJ. In addition, the system structure is simple, stable, and photonic integratable.

Demonstration of 40-Gb/s Packet Routing Using All-Optical Header Processing

We show simultaneous forwarding of two optical packets through a 2times2 spatial switch at 40 Gb/s using only two ultrafast nonlinear interferometers. This demonstrates a scalable all-optical header processing architecture applicable for general network topologies and can lead to reduced size, weight, and power requirements as compared with electronic solutions. Clear open eye diagrams were observed and a packet error rate of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-6</sup> , comparable with current electronic router error rates, was measured for the entire system

Architectures and Buffering for All-Optical Packet-Switched Cross-Connects

This paper considers the performance of an all-optical packet-switched cross-connect. All-optical header processing and all-optical routing are implemented in the cross-connect architectures. The main metric considered to measure the performance is the packet loss ratio for the buffering. This is influenced primarily by three factors. The first is the cross-connect architecture: feedback or feed-forward buffering, incorporating wavelength domain contention resolution. The second is the selection of the fibre delay line distribution: degenerate or non-degenerate distributions. And the third is the traffic load together with the traffic model used for the performance analysis: a Poisson distribution or a self-similar model. It is shown that the optimal implementation of a feedback buffer requires a technique such as overflow buffering as well as the superior performance of an all-optical switch in order to maintain signal quality through multiple recirculations.

Exploiting time-to-wavelength conversion for all-optical label processing

We propose a novel asynchronous all-optical header processor based on time-to-wavelength conversion. It always requires only four optical functional blocks, i.e., the whole complexity does not linearly scale with the number of possible headers. The scheme is experimentally demonstrated at 10.9 Gb/s and four different headers are distinguished at four distinct outputs. The limited amount of switches (four), the low optical power operation, and the potential photonic integration of each switch in a single chip make the system highly scalable and, therefore, suitable for devising an all-optical packet switch.

Compact header processing circuit for optical DPSK packets

By means of only one SOA a compact all-optical circuit that simultaneously extracts the header information and produces a sequence of multiwavelength coloured pulses from the DPSK packets is demonstrated. Combined with an optical demultiplexer, this realises a highly scalable all-optical header processor based on time-to-wavelength conversion. Experimental results demonstrate operation on packets with eight different DPSK headers at 10 Gbit/s. The system requires low optical power, can potentially operate at high speed, is asynchronous and suitable for photonic integration in a single chip.

1/spl times/4 all-optical packet switch at 10 gb/s

We demonstrated a 1/spl times/4 all-optical packet switch with all-optical header processing at a header rate of 5 Gb/s and payload rate of 10 Gb/s using injection-locking in a single Fabry-Pe/spl acute/rot laser diode at each output port of the switch.

A Minimalist Approach to All-Optical Packet Switching

By retaining only the most essential packet-switching functions in the optical domain, a single Fabry Perot Laser Diode can function as an all-optical on/off switch with all-optical header processing, and an all-optical add/drop node can be used to construct an all-optical ring network.

All-optical header processing using an injection-locked Fabry-Pérot laser diode

Simultaneous all-optical header processing and control-packet switching are demonstrated by using multiwavelength injection-locking in a single Fabry–Pérot laser diode. A special two-level control packet is used to process the header of the data packet at 5 Gb/s. The entire control packet is all optically switched ON or OFF. © 2005 Wiley Periodicals, Inc. Microwave Opt Technol Lett 44: 342–345, 2005; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.20629

All-optical header processing system based on time-to-wavelength conversion for pure DPSK packets

Presented is a novel asynchronous all-optical header processing system for pure DPSK packets based on time-to-wavelength conversion of the header information that requires only four optical functions independently of the number of headers. Experimental results at 12.5 Gbit/s demonstrate that four DPSK headers are distinguished at four distinct outputs. The system requires low optical power, is highly scalable, and allows for potentially high-speed operation and photonic integration in a single chip.

All-optical header processing using control signals generated by direct modulation of a DFB laser

On-the-fly all-optical header processing and control signal generation were simultaneously realized using a dual-wavelength injection-locked Fabry–Pérot laser diode. The special two-level input control signal was generated by direct modulation of a distributed feedback laser. The header processing rate is 2.5 Gb/s, the payload data rate is 10 Gb/s, and the packet length is 25.6 ns. The switching ratio for the switched control signals measured spectrally was improved from 3 dB to over 20 dB by using a polarizer.

Ultrafast Asynchronous Multioutput All-Optical Header Processor

We present a novel all-optical header processing technique that can be utilized in all-optical packet switches. The header processor consists of a terahertz optical asymmetric demultiplexer in combination with a header preprocessor that separates the packet header from the packet payload. Experimental results show asynchronous operation of the header processor at a header bit rate of 10 Gb/s in the case of two output ports. This concept can, however, be extended to a larger number of output ports, operates at low power, and allows photonic integration.

Optical Signal Processing Based on Self-Induced Polarization Rotation in a Semiconductor Optical Amplifier

We demonstrate novel optical signal processing functions based on self-induced nonlinear polarization rotation in a semiconductor optical amplifier (SOA). Numerical and experimental results are presented, which demonstrate that a nonlinear polarization switch can be employed to achieve all-optical logic. We demonstrate an all-optical header processing system, an all-optical seed pulse generator for packet synchronization, and an all-optical arbiter that can be employed for optical buffering at a bit rate of 10 Gb/s. Experimental results indicate that optical signal processing functions based on self-polarization rotation have a higher extinction ratio and a lower power operation compared with similar functions based on self-phase modulation.

All-optical header processor for packet switched networks

A serial all-optical header processing technique is presented that is based on the two-pulse correlation principle in a SLALOM configuration. The operation is demonstrated using optical data packets with a packet header at 2.5 Gbit/s and Manchester encoded packet payload at 10 Gbit/s. Experimental evidence is provided in the case of two different output ports. A Bragg grating assisted all-optical header pre-processor based on self-phase modulation in a semiconductor optical amplifier is also presented. It is shown that the header pre-processor improves the performance of the SLALOM-based header processor and that the packet structure can be simplified.

Multiple-output all-optical header processing technique based on two-pulse correlation principle

A serial all-optical header processing technique based on a two-pulse correlation principle in a semiconductor laser amplifier in a loop mirror (SLALOM) configuration that can have a large number of output ports is presented. The operation is demonstrated experimentally at a 10 Gbit/s Manchester encoded data stream. Experimental evidence is provided in the case of two different output ports.

Demonstration and performance analysis for the off-ramp portion of an all-optical access node

Ultrafast processing of packets is demonstrated and the performance analyzed for the off-ramp portion of an all-optical access node. The off-ramp consists of synchronized fiber lasers driving an all-optical header processor that includes nonlinear optical loop mirrors (NOLM), electrooptic router, and demultiplexer in the form of a two-wavelength NOLM. We achieve switching contrasts of 10:1 for the header processor and demultiplexer with switching energies of 10 pJ and 1 pJ, respectively. Also, a proposed measurement technique to obtain eye diagrams is used to analyze the all-optical header processor using the synchronized lasers. Using this technique, we obtain an eye diagram with a Q value of 7.1/spl plusmn/0.36, which corresponds to a worst case BER value of 8.8/spl times/10/sup -12/ for a 95% confidence level. Finally, simulation models are used to verify and compare the experimental results, and we find good agreement. We also use the model to study the various causes for the degradation of the Q value through our system.

System performance measurements for an all-optical header processor using 100-Gb/s packets

We experimentally measure the eye diagram of an all-optical header processor using a crosscorrelator to achieve picosecond resolution. By varying 100-Gb/s header packets, we measure an eye diagram with a Q-value of 7.1 at 12-pJ packet pulse energy for the all-optical header processor consisting of all-optical logic gates and synchronized fiber lasers. From the Q-value, we also statistically calculate the potential bit-error-rate performance of 7.0/spl times/10/sup -13/. By measuring the change in Q-values as a function of input power, we find that input power fluctuations degrade the performance of the header processor by reducing the switching contrast of the logic gates in the header processor.

All-optical packet-drop demonstration using 100-Gb/s words by integrating fiber-based components

Packet-drop function for a time-division multiplexing network using 100-Gb/s, 8-b words is experimentally demonstrated by integrating all-optical header processing and payload demultiplexing with electrooptic packet routing. The header processor consists of two levels of all-optical logic gates based on low birefringent nonlinear optical loop mirrors (NOLMs), and the payload demultiplexer is a two-wavelength NOLM. Both devices are driven by synchronized lasers with timing jitter under 1 ps. The contrast ratios for both header processor and demultiplexer are 10:1 and that of the packet router is 17 dB. The switching energies for header processing and payload reading are 10 and 1 pJ/pulse, respectively.