With devices and interconnects now being scaled to below the limits of even the most advanced lithographic patterning, dimensional control requires new thin-film processes with atomic-scale control of thickness, uniformity, morphology, and material and electrical properties at all levels, from the atomic scale to the equipment scale. With ever increasing complexity in process technologies, chemically selective and/or area-selective processes can be an efficient way to meet future manufacturing requirements. Novel process technologies are needed for deposition, etch and cleans with atomic level precision to enable area-selective-processing at the structure and material level [1]. In this tutorial we will review and discuss trends in Atomic Layer Processing technologies for advanced semiconductor device manufacturing. The topics and technologies explored in this presentation include atomic layer deposition (ALD), atomic layer etching (ALE), selective deposition and etching, advanced surface preparation, EUV lithography, and self-aligned and multiple patterning schemes among others. Applications include critical material and manufacturing challenges for advanced Logic and Memory devices, including high-k oxides and metals, interconnects, capacitors, as well as Patterning, including Multi Patterning, Fully-Self-Aligned patterning and EUV [2]. A key point of this presentation will be to educate attendees how these advanced process technologies can be leveraged synergistically to deliver power, performance, area and cost scaling for future devices. Examples will be given so that attendees can understand how advanced process technologies will be used in future device manufacturing as well as the benefits and tradeoffs in their use.