Adaptive Sigma-delta Modulator Research Articles

Mono-bit millimeter-wave channel estimation: Bayesian and adaptive quantization frameworks

To achieve a more reasonable cost, employment of a mono-bit quantization structure is essential in wide bandwidth millimeter-wave communications (mmW). However, in mmW channel estimation, one of the critical challenges of mono-bit quantization in each branch of the antenna is the loss of data amplitude. The latest researches offer several approaches to estimate the channel in mono-bit single and multiple antenna structures. Such methods not consider the recovery of channel amplitude and consequently are limited to finding direction. Moreover, they do not provide sparsity into account. Thus, two new schemes are introduced based on a non-adaptive Bayesian algorithm and adaptive sigma–delta modulation (SDM) to tackle these issues. In both methods, we exploit the sparsity of mmWC channel in the angle domain. To extract the sparse-based Laplacian density in case that the sparsity level is unknown, we propose a Bayesian algorithm which employs a hierarchical chain composed of Gaussian and exponential prior. Furthermore, in case that the sparsity level of an application is known or can be estimated, the adaptive mono-bit quantization schemes is proposed which retrieves the amplitude of the sparse channel by the aid of SDM and CS tools. Simulation results show that the adaptive mono-bit estimator outperforms the non-adaptive Bayesian approach comparing the mean square error as an index. Also, the proposed adaptive method, especially when a sufficient number of one-bit measurements are available, can asymptotically converge into optimum full-bit observations with lower computational complexity.

Elimination of idle tones by a second order 2-bit adaptive sigma delta modulation system

We investigate the operation and implementation aspects of a second order 2-bit adaptive sigma---delta modulation system that offers complete elimination of the idle tones without dithering as needed by various other adaptive and simple sigma delta schemes. Performance comparisons made by computer simulation indicate that this advantageous feature together with the enhanced performance stability is due to the combination of both "memory" and "look-ahead" estimation of the employed step-size adaptation algorithm.

Elimination of Idle Tones by a 2-Bit Adaptive Sigma-Delta Modulation System

The operation of a first-order 2-bit adaptive sigma-delta modulation system is described and discussed in this paper. The system operation is based on the combination of both “memory” and “look-ahead” estimation in the employed step-size adaptation algorithm of the basic quantizer. In comparison to simple systems and other adaptive sigma-delta systems, computer simulation results show that these features of the described system are responsible for the high SNR values and the extended dynamic range achieved for AC signals as well as the noise power reduction of almost 10 dB and the complete elimination of the idle tones for DC signals. However, such an advantageous performance requires the least possible multiplicative error accumulation, and this cannot be achieved without analog circuits of the highest possible accuracy.

Development of a new adaptive sigma-delta modulator scheme applied to multilevel inverter control

Interest in multilevel inverters is increasing in recent years, especially in high voltage applications. Traditional pulse width modulation (PWM) techniques can be applied to control this type of switched converter. However, it is necessary to adapt these techniques to the particularities of multilevel operation. As an alternative, other modulation techniques, such as sigma-delta modulation (SDM) can be used. In this case, it is possible to use advanced modulation techniques, such as adaptive modulation, to adapt the SDM to the multilevel operation. This article presents a new adaptive sigma-delta modulator that controls a five levels multilevel inverter. The algorithm that generates the sigma-delta signal is implemented in a field-programmable gate array (FPGA). This allows a very fast operation independent of the overall control circuit operation response. In addition, the FPGA can generate the control signals necessary to drive the power semiconductors in the power stage. The resulting modulator is simpler than the PWM version.

Description of a 2-Bit Adaptive Sigma-Delta Modulation System with Minimized Idle Tones

A 2-bit adaptive sigma delta modulation system that inherently eliminates the idle tones present in conventional and other adaptive sigma delta systems is described. The system incorporates both memory and look-ahead instantaneous step-size estimations and, as shown by computer simulation results apart from eliminating the unwanted idle tones despite dithering, it offers improved SNR performance and extended dynamic range.

New Proposed Second-Order ASDM Using OTAs

In this work, we present a new proposal for the second-order Adaptive Sigma Delta Modulation (ASDM). The new proposed Adaptation scheme is based on using Operational Transconductance Amplifier (OTAs) as an Integrator and as an Amplifier to adapt the quantizer step-size to control the voltage gain by feedback the quantizer output through adaptation scheme. The step-size is changing up or down by the output voltage of the integrator for every clock period. A comparison with general second-order SDM proves that our idea about using OTAs to achieve a high resolution and confirm the signal-to-noise ratio is better than GSM.

Stability and performance analysis of an adaptive sigma-delta modulator

This work develops an adaptive sigma-delta modulator that is based on adapting the quantizer step-size using estimates of the quantizer input rather than the modulator input. The adaptive modulator with a first-order noise shaping filter is shown to be bounded-input bounded-output stable. Moreover, an analytical expression for the signal-to-noise ratio is derived, and it is shown to be independent of the input signal strength. Simulation results confirm the signal-to-noise ratio performance and indicate considerable improvement in the dynamic range of the modulator compared to earlier structures.

Adaptive sigma-delta modulation with one-bit quantization

A method for improving the signal-to-noise ratio (SNR) of sigma-delta modulators with one-bit quantization is presented. The two-level feedback signal of a standard sigma-delta modulator is replaced by a multilevel signal, which is a superposition of two parts. One part s(n) represents a rough estimate of the instantaneous amplitude of the input signal (prediction signal), and the other y/sub b/(n) is the sign of the quantizer output, multiplied with constant b. Compared to a nonadaptive modulator, the amplitude of y/sub b/(n) is reduced. Therefore, less noise power is introduced in the quantizer, and the SNR is considerably enhanced. Signal s(n) is derived numerically from the quantizer output y/sub 0/(n) according to a particular adaptation algorithm. Except for the DC-level of s(n), sequence y/sub 0/(n) contains the full digital information of the modulator input signal. From y/sub 0/(n), a digital multilevel sequence w/sub 0/(n) can be calculated, which represents the digital modulator output. The price paid for the improved SNR is a moderate slew rate limitation of the input signal. The approach is basically suited for a wide class of sigma-delta modulators. Here, simulation results and an example for a practical implementation of an adaptive sigma-delta modulator of first order are presented.

Adaptive sigma-delta modulation for use in DACs

Adapting the loop filter in a sigma-delta modulator (SDM) increases the signal/noise ratio (SNR) at low input amplitudes, and also allows stable operation at high amplitudes where a fixed system would normally be unstable. Adaption is easily implemented in SDM digital/analogue converters (DACs).