Active Filter Circuit Research Articles

Current-mode Universal Filter using Fin type Field Effect Transistor (FinFET) Transistor-Based Multioutput Current Controlled Current Conveyor Transconductance Amplifiers

For single digit nanometric dimensions, the fin type Field Effect Transistor (FinFET) transistor is a promising technology. FinFETs are utilized to reduce power consumption and boost performance since the two gate voltages may be regulated independently or dependently. This work investigates the design of multioutput current-controlled current conveyor transconductance amplifiers, or M.O.C.C.C.C.T.A.s. to carry out all standard operations, such as LP, HP, BS, BP, and AP. One of the circuit's features is its capacity to change the pole frequency electrically and independently by applying the proper input bias currents based on the quality factor. There are merely two grounded capacitors and two M.O.C.C.C.C.T.A.s in the simple circuit design. The recommended design is perfect for further development into an integrated circuit because it only contains grounded components and does not require any external resistors. The FinFET 7 nm PTM-MG model is used in LT-spice to simulate the suggested active filter circuit. The obtained findings are in good agreement with the theoretical prediction.

Analysis and Design of Third-Harmonic Current Injection Active Filter Circuit for the Aircraft

Analysis and Design of Third-Harmonic Current Injection Active Filter Circuit for the Aircraft

A Modeling Approach for Designing New Acoustic Materials

In this study, mathematical modeling design based on Sound Transmission Loss measurement results of new acoustic material samples with natural content was carried out. Using the test samples in question, transfer function of acoustic materials based on electronic filter circuit design and a transition design method for the production of new acoustic materials by utilizing the transfer function is presented. Based on the experimental results of the test samples, it is the most suitable low-pass filter structure for the proposed design. In this study, active Sallen-Key low-pass filter structure is preferred and used. Sound Transmission Losses in dB (decibels) of acoustic samples were obtained experimentally for 500, 1000, 2000 and 4000 Hz. fundamental frequencies in the literature. Based on these data, transfer function simulation suppression gain results were obtained in TINA-TI program, active filter circuit designed, and MATLAB program. When the other results were compared in the experimental results, it was seen that very close values were obtained. It has been demonstrated that the proposed method can be used effectively in the design and examination of new acoustic materials.

Improved the two DC capacitors’ voltage balancing of three-level NPC inverters applied in electric vehicles

Excessive unbalance of the DC capacitor voltages of the inverter can cause overvoltages on power components and capacitors, causing unintended low-order harmonics on the load side such as second harmonics, 3rd, 4th, 5th, ..., causing direct harm to the motor load, reducing the controllability of the reverse voltage and filter compensating current for the active filter circuit, affect to the performance of electric vehicles (EVs). Therefore, maintaining the DC capacitors' voltage balance will control the multi-level inverter's input quality and ensure the output quality in terms of Total Harmonic Distortion (THD). The paper proposes a method to control the two DC capacitors’ voltage balance of the 3-level inverter, using the principle of offset function separation. The analysis results suggest that the NPC three-level modulation technique should be implemented to satisfactorily achieve the neutral line current (iNP). Compared with recent international publications, the proposed new algorithm can save and reduce switching loss; the transient dynamic response can be adjusted easily. Maintaining the capacitor voltage balance allows the design with the smallest capacity to reduce voltage stress on components. The proposed results are partially verified through simulation and experiment.

Virtual lab design for active filter circuits

Active filter circuits are a crucial topic in electrical, electronics and signal processing education, but their complexity often poses significant challenges to traditional classroom teaching. Virtual labs provide an immersive and interactive learning experience without the need for costly equipment and materials, offering a solution to these challenges. In this research paper, the approach to designing and implementing a virtual laboratory of active filter circuits using JavaScript is presented. The lab includes a breadboard, function generator, multi-meter, and uses a simulation engine to calculate voltage and frequency values in circuits. The virtual lab was evaluated through user research with engineering and science students, and it was found to be highly effective in teaching active filter circuits. Virtual labs are an essential tool in engineering education, providing increased flexibility and reduced costs.

An intelligent fault detection approach for digital integrated circuits through graph neural networks.

To quickly and accurately realize the fault diagnosis of analog circuits, this paper introduces the graph neural network method and proposes a fault diagnosis method for digital integrated circuits. The method filters the signals present in the digital integrated circuit to remove noise signals and redundant signals and analyzes the digital integrated circuit characteristics after the filtering process to obtain the digital integrated circuit leakage current variation. To the problem of the lack of a parametric model for Through-Silicon Via (TSV) defect modeling, the method of TSV defect modeling based on finite element analysis is proposed. The common TSV defects such as voids, open circuits, leakage, and unaligned micro-pads are modeled and analyzed by using industrial-grade FEA tools Q3D and HFSS, and the equivalent circuit model of resistance inductance conductance capacitance (RLGC) for each defect is obtained. Finally, the superior performance of this paper in fault diagnosis accuracy and fault diagnosis efficiency is verified by comparing and analyzing with the traditional graph neural network method and random graph neural network method for active filter circuits.

Rancang Bangun Sistem Penampil Suhu Bahan Bakar Reaktor Kartini

The Kartini reactor is a TRIGA-type research reactor with an operating power of 100 kW. The Kartini reactor was built in 1974 and is used for research, irradiation, education, and training purposes. In 2004, this reactor failed to display the fuel temperature in the control room. Therefore, a simple system is made to temporarily show the fuel temperature value while the fuel temperature display in the control room is improved. This system is designed to measure reactor fuel temperatures up to 250 0C. This system consists of an operational amplifier circuit (op-amp), an active low-pass filter circuit, an analog-to-digital converter circuit, and an AT89S51 microcontroller with an LCD circuit. First, the method converts the analog input into a digital value using ADC-0809. Next, the microcontroller's digital data from ADC-0809 is compared with the temperature value of the type K thermocouple. Finally, the temperature value (in 0C) closest to the digital value resulting from the ADC conversion is displayed by the microcontroller via a liquid crystal display. The results of the equipment being made satisfactory are proven by measurements of the Kartini reactor, which was operated for 4.5 hours at a power of 100 kW showing the temperature value on the core in ring B with a value of 117 0C. The voltage vs. temperature table on the K-type thermocouple has validated this temperature value. Keywords: reactor fuel temperature, microcontroller, analog to digital converter.

A New Grounded Capacitance Multiplier Using a Single ICFOA and a Grounded Capacitor

In this study, a new grounded capacitance multiplier (GCM) circuit is proposed. The proposed GCM contains a canonical number of components, a single inverting CFOA (ICFOA), a grounded capacitor and two resistors. It has low THD and power consumption. Moreover, its operating frequency range is from about 1 Hz to 30 kHz. A second-order active filter circuit including two ICFOAs and two grounded capacitors is given as an application example. Some simulations via the SPICE program are performed. Experimental verification is also achieved by using the AD844s.

75–86-GHz Signal Generation Using a Phase-Controlled Quadrature-Push Quadrupler Driven by a QVCO or a Tunable Polyphase Filter

This article demonstrates a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$W$ </tex-math></inline-formula> -band local-oscillator generation technique in 120-nm SiGe BiCMOS technology with high output power and high efficiency. The circuit employs a frequency quadrupler that is driven with differential quadrature inputs that are provided by either a quadrature voltage-controlled oscillator (QVCO) or a tunable active polyphase filter (PPF) circuit. The quadrupler employs a phase-controlled quadrature-push (PCQP) topology using stacked devices with a lower class-C common-emitter (CE) amplifier generating a current that is then modulated by an upper common-base (CB) amplifier driven out-of-phase with the lower devices. Such a structure generates a strong fourth-order harmonic. Four such stacks driven at their input using accurate differential quadrature signals increase the fourth-harmonic output power while suppressing other harmonics. The differential quadrature signals for the quadrupler are provided using either a PPF circuit or a capacitive injection-locking QVCO, which achieves wide tuning range and low phase noise. Both approaches are evaluated through the measurement of separate test circuits. The LO circuit using the QVCO provides 8–11.5-dBm output power over 75.2–83 GHz, power efficiency of 2.2–4.1%, including QVCO and buffer power, >20-dB harmonic rejection in the lower frequency range, and >14.4-dB harmonic rejection in the upper frequency range. The LO circuit using the active PPF provides 8.4–11.2-dBm output power over 75.6–82.8 GHz, power efficiency of 2.4–4.8%, including PPF and buffer power, and >23-dB harmonic rejection.

Memristor Modeling Using the Modified Nodal Analysis Approach

The memristor has long been presented as the fourth fundamental circuit element alongside the resistor, the capacitor, and the inductor. As the future of computing heads toward neuromorphic circuits, there has been a renewed interest in the modeling and simulation of memristors which have emerged as promising key components in the design of these systems. Despite such critical applications, very few models have been presented in the literature that allow for the automated and flexible integration of memristors in different simulators. In this article, three different models of the memristor are presented using the modified nodal analysis (MNA) formulation technique. Each stamp is tested and compared with a theoretical model of the memristor. Simulations are also performed on a memristor-based active high-pass filter circuit to demonstrate the accuracy of the model.

Обоснование схемы активного фильтра гармоник на основе гибридного каскадного инвертора

With an increase in the number of levels in the inverter, the circuit becomes more complicated, the number of semiconductor switches increases. Therefore, topologies, which make it possible to obtain an increase in voltage levels with a decrease in the number of semiconductors, to increase the performance and reliability of the system, are of great interest. The paper proposes a scheme of a hybrid cascade inverter, considers a method of pulse-width modulation based on a carrier, and presents a block diagram of an algorithm for generating reference modulating signals in an optimized method of pulse-width modulation. To control a hybrid inverter as part of an active harmonic filter, a method of pulse-width modulation of the carrier is proposed. It allows reducing the common-mode voltage, switching losses, and minimizing current and voltage harmonics. The paper describes the PWM algorithm, on the basis of which the control signals are modulated and then compared with a triangular carrier to generate a sequence of pulses that turn on or turn off semiconductor switches. The purpose of the proposed solutions is to improve harmonic distortion caused by non-linear load in a 0.4 kV low-voltage system. The results of modeling the proposed active harmonic filter circuit are presented. Based on the studies performed, it is shown that the use of an active harmonic filter based on a 5-stage hybrid inverter with pulse-width modulation control is an effective means of filtering higher harmonics on 0.4 kV low voltage buses in the presence of a nonlinear load, which allows solving the problem of eliminating the impact of higher harmonics on the production activities of the enterprise.

Дослідження температурної нестабільності в активних НВЧ фільтрах та методи її зменшення

The article presents a study of methods for reducing temperature instability in active microwave filters. The analysis of the effect of temperature on the parameters of an active microwave filter is carried out. The results of experimental studies of the temperature characteristics of microwave filters are also presented. When designing digital systems, especially modern ones that operate with a clock frequency or that use a radio channel in the microwave and microwave range, there is usually a problem of increasing the reliability or reducing the overall size while maintaining high electrical parameters. Requirements for miniaturization of microwave equipment, the task is to create filter circuits that are suitable for integrated production. Unlike low-frequency active filters, when constructing microwave filters, it is necessary to take into account the inertial properties of transistors. Therefore, studies of various stripe active microwave filter circuits exploit reactive phenomena in the transistor. The possibility of their temperature and dynamic stabilization by changing the emitter current of a bipolar transistor is shown. Various circuit solutions for the implementation of this method are proposed. As experimental studies have shown, with increasing temperature, there is a decrease in the filter transfer coefficient at the quasi-resonant frequency. Experimental studies have shown that in order to stabilize the transfer coefficient of temperature rise, an increase in the emitter current is necessary, which can be achieved by a general increase in the supply voltage. Thus, for thermal stabilization of the frequency response of the microwave filter, it is necessary to regulate the current of the transistor emitter simultaneously with the temperature change. The magnitude of the emitter current adjustment when the temperature changes from –60 °C to +100 °C is 3—4 orders of magnitude for low-power silicon transistors.

Active Power Decoupling for a Modified Modular Multilevel Converter to Decrease Submodule Capacitor Voltage Ripples and Power Losses

The usage of too many sizeable capacitors significantly increases the volume and cost of the modular multilevel converter (MMC), and limits its spread in medium- and high-voltage applications. By adding a buck-type active power filter (APF) circuit into a particular MMC topology [of which each phase multiplexes one submodule (SM)], a modified MMC (APF-M3C) topology, which inherently has the ability to suppress capacitor voltage fluctuations and decrease the power losses compared with conventional MMC topology, is proposed in this article. Both the SM capacitor voltage ripples, which can be reduced up to 50% of original value and are related to the SM capacitance, and the arm currents, which are related to SM power losses, are calculated in detail. Its topology, and operating principle is presented in detail, and a novel modulation method for the APF-M3C topology are proposed. In addition, an improved control method for the voltage balancing is also recommended to further reduce system cost and power losses. Finally, the APF-M3C topology and traditional MMC simulation and experimental platforms were built. Simulations and experimental results verify the feasibility and effectiveness of the APF-M3C topology and control strategy by comparing with the conventional MMC.

Single Phase Power Factor Improvement Based Instantaneous Power P Q Theorm

This paper presents how to harmonic disturbance reduce on single phase power system. One of the most popular method is harmonic signal extraction with instantaneous power p q theorm. This algorithm implemented to harmonic cencellation by active power filter circuit be paralled with the non linier load. This filter generates of current compensation that are injected into the grid to improve power quality. This Filter is built by an inverter circuit that consists of a mosfet switch array and capasitor mounted on DC link side. Two types of loads are resitive inductive and resistive capasitive produce of current source wave form that close pure sinusoid. Simulation results show the THD index fell to the level of 2.7% in accordance with IEEE 519 standard rules which states that the harmonics content of the power system may occur below 4%, indicating that the power system can be categorized as having good quality.

Design Low Noise Voltage Amplifier for Hand-Held Electronic Reader

There are limited number of electrical based two type electrode electronic readers for biosensors are commercial available because of the noise issues and amplification at nano to pico ampere current range. This research is mainly focused on designing an active low pass filter circuit of electronic reader for biosensors. The entire circuits are comprised of a voltage converter circuit, active low pass filter circuit, voltage amplifier, microcontroller and display unit. The circuit capture, filter and amplify nano and pico ampere current convert it to detectable voltage range as an output signal to the processing circuit. NodeMCU was act as the process and control circuit to read the output voltage from the amplifier circuit. The signal generator will act as a replacement for the biosensor input current and oscilloscope will display the input and output signal. The Design Spark PCB software was used to design the voltage amplifier circuit. Arduino software was used to create a programming code to upload in NodeMCU microcontroller.

Design of Audio Signal Analyzer Based on MCU and FPGA

This audio signal analyzer is based on a microcontroller (MCU) and a field programmable gate array (FPGA). It consists of a controllable gain amplifier circuit, an active filter circuit, A / D conversion and D / A feedback circuits, and a main control circuit and liquid crystal display module. Through AD conversion, the audio signal is sampled, the continuous signal is discretized, and then the FFT fast Fourier transform operation is performed to analyze and process each frequency component and power of the audio signal in the time and frequency domain. By controlling the gain of the amplifier to expand the dynamic range of the input signal and improve the sensitivity, it can also complete the corresponding human-computer interaction control based on the PS2 keyboard input, while using the high-resolution LCD to display the signal spectrum. The audio signal frequency range that this system can accurately measure is 20Hz-10KHz, its amplitude range is 5mVpp-5Vpp, and the resolution is divided into 20Hz and 100Hz. The measured power accuracy is as high as 1%, and the period of the periodic signal can be accurately measured, which is the ideal solution for audio signal analyzers.

A Modular Multilevel Converter With Active Power Filter for Submodule Capacitor Voltage Ripples and Power Losses Reduction

Modular multilevel converter (MMC) topology has been widely used in the medium-/high-voltage applications. However, large capacitance is needed to suppress submodule (SM) capacitor voltage ripples. This article presents a modified MMC with the active power filter (APF-MMC) paralleled between the N th SM of the upper arm and the first SM of the lower arm in each phase without changing the original topology. It is intended to decrease the capacitor voltage fluctuations and power losses of SMs by diverting the phase low-frequency ripple powers into the storage capacitor of the additional active power filter circuit. Both the detailed SM capacitor voltage fluctuations, which can be reduced up to 50% of the original value in the traditional MMC topology, and the SM average currents, which are proportional to SM switching losses and can be reduced up to 87.83% of the original value, are analyzed. The arm rms currents are also derived, which are related to SM conduction losses. Moreover, the operating principle, modulation method, and control strategy are presented in detail. Finally, the APF-MMC and the traditional MMC topology simulation and experimental platforms were built. The simulation and experimental results demonstrate the validity and performance of the APF-MMC topology and control strategy by comparing with the traditional MMC topology.

Active common‐mode filter for capacitive‐coupled isolated signalling

Capacitive coupling is a well-established principle in isolated signalling. A major challenge esp. in power electronics is common-mode transient immunity caused by the displacement currents at the coupling capacitors. Digital isolator integrated circuits (ICs) employ modulated signalling, the authors propose an active filter circuit to remove common-mode components from baseband signals. This allows for reliable data transmission during transients in power semiconductor control, AC-coupled RS-485 or transformer-less Ethernet. The filter structure is simple and consists of two current mirrors, one for positive transients, and one for the negative. A current on one differential signal line is ‘mirrored’ onto the other, common-mode currents are conducted to ground. Differential signals are minimally affected. The proposed filter is verified in simulation and experiment: baseband signalling with 50 Mbps in presence of 30 kV/ burst transients is achieved using discrete semiconductors. Even better results are expected when monolithically embedding the filter in an integrated circuit.

Uncertainty Quantification of CMOS Active Filter Circuits: A Non-Intrusive Computational Approach Based on Generalized Polynomial Chaos

Semiconductor fabrication technologies as applies to the nanometer-era paradigms of nowadays have rendered uncertainty quantification analyses through component-level parameters compulsory and indispensable. Frequency responses of CMOS active filters are invariably observed to be affected by probabilistically modelled parameter deviations, and in this article the focus is on the fast and accurate quantification of the uncertainties pervading CMOS active filters in terms of their magnitude frequency responses. Previous work dominantly has preference for the widely recognized non-intrusive Monte Carlo methods, which bring about a disproportionately high computational burden. Also discomfitures are observed to arise due to apparently inadequate ensemble volumes and a limited variety of distribution functions that are chosen to be utilized, along with seemingly insufficient means of resulting data visualization and the lack of accurate probabilistic quantification. Generalized Polynomial Chaos (gPC) based stochastic spectral techniques, which usually offer reduced computational complexity with respect to Monte Carlo, targeting CMOS active filters do not seem to have drawn much attention; the few related publications offer utility in a limited scope of electronic components. In this article, we carry out uncertainty quantification analyses in order to compute partial or approximate stochastic characterizations of the magnitude frequency responses of several multi-component CMOS active filter circuits with the gPC-based stochastic collocation technique. The pertaining inherent non-intrusive nature is exploited, and the stated issues associated with the previous work are addressed. We utilize a stokhos-based MATLAB/C++ toolbox of our own design, on whose software architecture, features, and facilities we provide profound details, and present performance comparisons with Monte Carlo along with intuitive and insightful comments, in an endeavor to suggest that such observations may prove to be beneficial to circuit designers.

Analysis of Ripple Current in the Capacitors of Active Power Filters

This article provides formulae to determine the root mean square (rms) value of a capacitor current in an inductive-capacitive-inductive (LCL) filter used in a parallel active power filter (PAPF) circuit. The article presents an analysis of three components of the capacitor current: a component forced by the usually distorted voltage of the grid; a component forced by the nonlinear load current harmonics and harmonics in the output current of the PAPF that compensates them (a novel aspect presented in this document); and a component forced by the inverters of the PAPF containing carrier and sideband harmonics. The article also presents formulae for determining the rms value of current harmonics in dc-link capacitors forced by the ripple of the ac output current without load of the filter inverters (also novel to this document). The results of the analysis have been confirmed by simulation and experimental research of a commercial active filter consisting of two parallel interleaved voltage inverters. Elements of the LCL filter of the PAPF have been selected according to dependencies available in scientific and technical literature. In addition, the formulae presented in the article are used to verify the correctness of selection of capacitors from the point of view of their catalogue acceptable rms value of capacitor current.