Active Charge Balancing Research Articles

Charge-Mode Neural Stimulator With a Capacitor-Reuse Residual Charge Detector and Active Charge Balancing for Epileptic Seizure Suppression.

This study proposes a charge-mode neural stimulator for electrical stimulation systems that utilizes a capacitor-reuse technique with a residual charge detector and achieves active charge balancing simultaneously. The design is mainly used for epilepsy suppression systems to achieve real-time symptom relief during seizures. A charge-mode stimulator is adopted in consideration of the complexity of circuit design, the high voltage tolerance of transistors, and system integration requirements in the future. The residual charge detector allows users to understand the current stimulus situation, enabling them to make optimal adjustments to the stimulation parameters. On the basis of the information on actual stimulation charge, active charge balancing can effectively prevent the accumulation of mismatched charges on electrode impedance. The capacitor- and phase-reuse techniques help realize high integration of the overall stimulator circuit in consideration of the commonality of the use of a capacitor and charging/discharging phase in the stimulation circuit and charge detector. The proposed charge-mode neural stimulator is implemented in a TSMC 0.18 µm 1P6M CMOS process with a core area of 0.2127 mm2. Measurement results demonstrate the accuracy of the stimulation's functionality and the programmable stimulus parameters. The effectiveness of the proposed charge-mode neural stimulator for epileptic seizure suppression is verified through animal experiments.

Benchtop and bedside validation of a low-cost programmable cortical stimulator in a testbed for bi-directional brain-computer-interface research.

Bi-directional brain-computer interfaces (BD-BCI) to restore movement and sensation must achieve concurrent operation of recording and decoding of motor commands from the brain and stimulating the brain with somatosensory feedback. A custom programmable direct cortical stimulator (DCS) capable of eliciting artificial sensorimotor response was integrated into an embedded BCI system to form a safe, independent, wireless, and battery powered testbed to explore BD-BCI concepts at a low cost. The BD-BCI stimulator output was tested in phantom brain tissue by assessing its ability to deliver electrical stimulation equivalent to an FDA-approved commercial electrical cortical stimulator. Subsequently, the stimulator was tested in an epilepsy patient with subcortical electrocorticographic (ECoG) implants covering the sensorimotor cortex to assess its ability to elicit equivalent responses as the FDA-approved counterpart. Additional safety features (impedance monitoring, artifact mitigation, and passive and active charge balancing mechanisms) were also implemeneted and tested in phantom brain tissue. Finally, concurrent operation with interleaved stimulation and BCI decoding was tested in a phantom brain as a proof-of-concept operation of BD-BCI system. The benchtop prototype BD-BCI stimulator's basic output features (current amplitude, pulse frequency, pulse width, train duration) were validated by demonstrating the output-equivalency to an FDA-approved commercial cortical electrical stimulator (R 2 > 0.99). Charge-neutral stimulation was demonstrated with pulse-width modulation-based correction algorithm preventing steady state voltage deviation. Artifact mitigation achieved a 64.5% peak voltage reduction. Highly accurate impedance monitoring was achieved with R 2 > 0.99 between measured and actual impedance, which in-turn enabled accurate charge density monitoring. An online BCI decoding accuracy of 93.2% between instructional cues and decoded states was achieved while delivering interleaved stimulation. The brain stimulation mapping via ECoG grids in an epilepsy patient showed that the two stimulators elicit equivalent responses. This study demonstrates clinical validation of a fully-programmable electrical stimulator, integrated into an embedded BCI system. This low-cost BD-BCI system is safe and readily applicable as a testbed for BD-BCI research. In particular, it provides an all-inclusive hardware platform that approximates the limitations in a near-future implantable BD-BCI. This successful benchtop/human validation of the programmable electrical stimulator in a BD-BCI system is a critical milestone toward fully-implantable BD-BCI systems.

Active charge balancer for CMOS integration of an array of neural stimulators

Neuromorphic engineering, wherein the structure of a neural system is reconstructed and its applications are exploited on CMOS integrated circuits, presents various developments. This study focuses on interface technology that can adapt CMOS integrated circuits to a neural system. Existing neural stimulators are designed to accurately transmit signals and accurately stimulate the nerves; however, embedding them into the brain is challenging owing to their size and power [1]. One solution is to reduce the circuit area and power consumption at the expense of certain precision. This study successfully induces nerve activity using a designed circuit that is connected to the brain of rat; the proposed circuit demonstrates a good effect of charge balance. Moreover, this paper proposes CMOS neural stimulating circuits with low power consumption and a small area.

A Hybrid Bipolar Active Charge Balancing Technique with Adaptive Electrode Tissue Interface (ETI) Impedance Variations for Facial Paralysis Patients.

Functional electrical stimulation (FES) is a safe, effective, and general approach for treating various neurological disorders. However, in the case of FES usage for implantable applications, charge balancing is a significant challenge due to variations in the fabrication process and electrode tissue interface (ETI) impedance. In general, an active charge balancing approach is being used for this purpose, which has limitations of additional power consumption for residual voltage calibration and undesired neurological responses. To overcome these limitations, this paper presents a reconfigurable calibration circuit to address both ETI variations and charge balancing issues. This reconfigurable calibration circuit works in two modes: An impedance measurement mode (IMM) for treating ETI variations and a hybrid charge balancing mode (HCBM) for handling charge balance issues. The IMM predicts the desired stimulation currents by measuring the ETI. The HCBM is a hybrid combination of electrode shorting, offset regulation, and pulse modulation that takes the best features of each of these techniques and applies them in appropriate situations. From the results, it is proved that the proposed IMM configuration and HCBM configuration have an optimal power consumption of less than 44 W with a power ratio ranging from 1.74 to 5.5 percent when compared to conventional approaches.

An active charge balancing method suitable for integration in the output-stage of electrical neural stimulators

An active charge balancing method suitable for integration in the output-stage of electrical neural stimulators

An Electrical Stimulator IC with Chopped Pulse based Active Charge Balancing for Neural Interface Applications

In this paper, a current-mode neural stimulator integrated circuit (IC) using novel active charge balancing technique is presented. The charge balancing technique proposed in this work is based on chopped pulse waveform, where the number of chopped pulses generated in the anodic phase is controlled accurately in order to limit the amount of residual potential at the electrode. In addition, a quick automatic electrode shorting process follows the active charge balancing phase to further discharge to a negligible residual voltage level in every stimulation cycle, ensuring a safe and long-term operation. Both symmetric and asymmetric stimulation pulse waveforms can be selected to provide wide flexibility for various stimulation environment. The stimulator IC designed using 0.18-μm standard CMOS process achieves 12.3 V of voltage compliance and can deliver 1 mA of maximum stimulation current with 5-bit resolution and high linearity. All circuit functions are integrated on-chip without external components, and the fabricated chip consumes only 0.095 mm² of active die area.

Active Charge Balancer With Adaptive 3.3 V to 38 V Supply Compliance for Neural Stimulators

Charge balancing has become a common key safety requirement of electrical stimulation systems. It reduces the risk of electrode dissolution and tissue damage, which might arise after unbalanced stimulation pulses. A CMOS integrated consequence-based active charge balancer is presented that instantaneously removes excess charges between two consecutive stimulation pulses. This balancer provides a highly adaptive power supply compliance from 3.3 V to 38 V, verified by measurements. In order to maintain the compensation behavior and efficacy over the entire supply range and to protect the active components at such high voltages, a quad-rail design is elaborated that overcomes the technological high voltage limitations of the employed 0.35 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS process. The presented charge balancing circuit consists of a fully differential operational transconductance amplifier for monitoring and voltage level translation, as well as an advanced class-B stage as current driver, designed in accordance with the quad-rail concept. Further system flexibility is provided by incorporating three different compensation current limitations of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\pm 500~\mu \text{A}$ </tex-math></inline-formula> , <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\pm 300~\mu \text{A}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\pm 200~\mu \text{A}$ </tex-math></inline-formula> . Additionally, two safety limits of ±50 mV and ±100 mV have been adopted. The charge balancer is very power efficient, it only dissipates 6.3 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{W}$ </tex-math></inline-formula> and 25 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{W}$ </tex-math></inline-formula> , at 3.3 V and 38 V respectively.

Active Charge Balancing Strategy Using the State of Charge Estimation Technique for a PV-Battery Hybrid System

Charging a group of series-connected batteries of a PV-battery hybrid system exhibits an imbalance issue. Such imbalance has severe consequences on the battery activation function and the maintenance cost of the entire system. Therefore, this paper proposes an active battery balancing technique for a PV-battery integrated system to improve its performance and lifespan. Battery state of charge (SOC) estimation based on the backpropagation neural network (BPNN) technique is utilized to check the charge condition of the storage system. The developed battery management system (BMS) receives the SOC estimation of the individual batteries and issues control signal to the DC/DC Buck-boost converter to balance the charge status of the connected group of batteries. Simulation and experimental results using MATLAB-ATMega2560 interfacing system reveal the effectiveness of the proposed approach.

A Prototype of a Fully-Implantable Charge-Balanced Artificial Sensory Stimulator for Bi-directional Brain-Computer-Interface (BD-BCI).

Bi-directional brain-computer interfaces (BD-BCI) to restore movement and sensation must achieve concurrent operation of recording and decoding of motor commands from the brain and stimulating the brain with somatosensory feedback. Previously we developed and validated a benchtop prototype of a fully implantable BCI system for motor decoding. Here, a prototype artificial sensory stimulator was integrated into the benchtop system to develop a prototype of a fully-implantable BD-BCI. The artificial sensory stimulator incorporates an active charge balancing mechanism based on pulse-width modulation to ensure safe stimulation for chronically interfaced electrodes to prevent damage to brain tissue and electrodes. The feasibility of the BD-BCI system's active charge balancing was tested in phantom brain tissue. With the charge-balancing, the removal of the residual charges on an electrode was evident. This is a critical milestone toward fully-implantable BD-BCI systems.

A mm-Sized Free-Floating Wireless Implantable Opto-Electro Stimulation Device.

Towards a distributed neural interface, consisting of multiple miniaturized implants, for interfacing with large-scale neuronal ensembles over large brain areas, this paper presents a mm-sized free-floating wirelessly-powered implantable opto-electro stimulation (FF-WIOS2) device equipped with 16-ch optical and 4-ch electrical stimulation for reconfigurable neuromodulation. The FF-WIOS2 is wirelessly powered and controlled through a 3-coil inductive link at 60 MHz. The FF-WIOS2 receives stimulation parameters via on-off keying (OOK) while sending its rectified voltage information to an external headstage for closed-loop power control (CLPC) via load-shift-keying (LSK). The FF-WIOS2 system-on-chip (SoC), fabricated in a 0.35-µm standard CMOS process, employs switched-capacitor-based stimulation (SCS) architecture to provide large instantaneous current needed for surpassing the optical stimulation threshold. The SCS charger charges an off-chip capacitor up to 5 V at 37% efficiency. At the onset of stimulation, the capacitor delivers charge with peak current in 1.7–12 mA range to a micro-LED (µLED) array for optical stimulation or 100–700 μA range to a micro-electrode array (MEA) for biphasic electrical stimulation. Active and passive charge balancing circuits are activated in electrical stimulation mode to ensure stimulation safety. In vivo experiments conducted on three anesthetized rats verified the efficacy of the two stimulation mechanisms. The proposed FF-WIOS2 is potentially a reconfigurable tool for performing untethered neuromodulation.

Analysis of an Active Charge Balancing Method Based on a Single Nonisolated DC/DC Converter

For lithium-ion batteries, active balancing can bring advantages compared to passive balancing in terms of lifetime and available capacity. Most known balancing techniques suffer from a low efficiency or high complexity and cost. This article proposes a new technical solution based on a nonisolated dc/dc converter and a low-speed switching matrix to overcome efficiency and power limitations of present balancing methods. The proposed circuit allows balancing current paths which are not possible with previous methods and results in balancing efficiencies of over 90%. The performance comparison is based on batch numerical simulations using calculated and measured efficiency values. The simulation results are compared to the approved active balancing method cell-to-cell and to passive balancing. A study case with eight randomly distributed battery cells shows an improvement in overall balancing efficiency of up to 47.4% and a reduction in balancing time of up to 36.9%. The available capacity increases from 97.2% in a passively balanced system to 99.7% for the new method. A hardware prototype was set up to demonstrate the working principle and to verify the numerical simulations.

An Implantable Neural Stimulator IC With Anodic Current Pulse Modulation Based Active Charge Balancing

Implantable electrical stimulators can be used to treat a variety of neurological disorders and restore paralyzed body functions. In electrical neural stimulation, the stimulator circuit with safe charge balancing is essential to minimize damage to electrodes and biological tissue. In this paper, an implantable current-mode neural stimulator for long-term safe electrical stimulation is presented. Anodic current pulse modulation active charge balancing technique is proposed to keep the residual voltage on the electrode within the safe window, which enables long-term safe stimulation. To ensure more complete charge balancing, the proposed active charge balancing technique can also be used with passive electrode shorting. Transistor stacking and dynamic gate biasing techniques can prevent the breakdown of standard MOSFET devices from high supply voltages, which enable the implementation of output current driver and charge balancing circuits without using HV process. The stimulator IC designed with 0.18- $\mu \text{m}$ standard CMOS process can generate up to 1 mA of stimulation current and only consumes an area of 0.11 mm2. Since all functions are implemented on-chip without using external components, the proposed stimulator IC is suitable for high-density implantable stimulation applications.

Active Cell Balancing Control Method for Series-Connected Lithium-Ion Battery

Power conveyance potentiality for series and parallel allied battery-packages are constrained by the wickedest cell of the string. Every cell contains marginally dissimilar capability and terminal voltage because of industrialized acceptances and functional situations. During charging or discharging progression, the charge status of the cell strings become imbalanced and incline to loss equalization. Therefore, the enthusiasm of this paper is to design an active charge balancing system for Lithium-ion battery pack with the help of online state of charge (SOC) estimation technique. A Battery Management System (BMS) is modeled by means of controlling the SOC of the cells to upsurge the efficacy of rechargeable batteries. The capacity of each cell is calculated by dint of SOC function estimated as a result of Backpropagation Neural Network (BPNN) algorithm through four switched DC/DC Buck-Boost converter. The simulation results confirm that the designed BMS can synchronize the cell equalization via curtailing the SOC estimation error (RMSE 1.20%) productively.

A design methodology for charge-balanced stimulators based on anodic current variation monitoring

Charge balancing is a major safety concern in neural and functional electrical stimulation. This paper presents a novel and safe active charge balancing design methodology in which, after each cathodic and anodic stimulation pulse, the value of the remaining voltage is compared to different voltage levels. According to the value of the remaining voltage, a specific amount of additional current is added or subtracted from the anodic current of the next stimulation cycle. The proposed method enables a straightforward hardware implementation, while guaranteeing that the remaining voltage is constrained within a safe window, well below the water window (e.g., ± 100 mV). Furthermore, in the proposed method, the control loop does not need any settling time when the stimulation starts (stimulator start-up). Using this method, different design examples are introduced for a retinal stimulator. A comprehensive system level simulation using MATLAB is presented for the first time, in order to prove the stability of the stimulators. This type of simulation shows the performance of the stimulators throughout any allowed stimulation parameter in a single plot. In addition, discrete-component implementations of an example of the proposed method confirms the results obtained from system-level mathematical modeling.

Development of a miniature device for emerging deep brain stimulation paradigms.

Deep brain stimulation (DBS) is a neuromodulatory approach for treatment of several neurological and psychiatric disorders. A new focus on optimising the waveforms used for stimulation is emerging regarding the mechanism of DBS treatment. Many existing DBS devices offer only a limited set of predefined waveforms, mainly rectangular, and hence are inapt for exploring the emerging paradigm. Advances in clinical DBS are moving towards incorporating new stimulation parameters, yet we remain limited in our capacity to test these in animal models, arguably a critical first step. Accordingly, there is a need for the development of new miniature, low-power devices to enable investigation into the new DBS paradigms in preclinical settings. The ideal device would allow for flexibility in the stimulation waveforms, while remaining suitable for chronic, tetherless, biphasic deep brain stimulation. In this work, we elucidate several key parameters in a DBS system, identify gaps in existing solutions, and propose a new device to support preclinical DBS. The device allows for a high degree of flexibility in the output waveform with easily altered shape, frequency, pulse-width and amplitude. The device is suitable for both traditional and modern stimulation schemes, including those using non-rectangular waveforms, as well as delayed feedback schemes. The device incorporates active charge balancing to ensure safe operation, and allows for simple production of custom biphasic waveforms. This custom waveform output is unique in the field of preclinical DBS devices, and could be advantageous in performing future DBS studies investigating new treatment paradigms. This tetherless device can be easily and comfortably carried by an animal in a back-mountable configuration. The results of in-vitro tests are presented and discussed.

Comments on "Compact, Energy-Efficient High-Frequency Switched Capacitor Neural Stimulator With Active Charge Balancing".

This manuscript points out some mistakes in the Introduction and in the table of comparison of a paper already published in this journal by Hsu and Schmid [1]. Although the main claim of [1] is still preserved, we believe the paper needs to be rectified for scientific correctness of the work.

A 22 V Compliant 56 &lt;inline-formula&gt; &lt;tex-math notation="LaTeX"&gt;${\mu}$ &lt;/tex-math&gt; &lt;/inline-formula&gt;W Twin-Track Active Charge Balancing Enabling 100% Charge Compensation Even in Monophasic and 36% Amplitude Correction in Biphasic Neural Stimulators

Closed-loop charge balancers make a considerable contribution to a safe and secure electrical stimulation and additionally present an alternative to bulky blocking capacitors. This CMOS-integrated, 22 V compliant Twin-Track active charge balancer accomplishes both instantaneous and long-term balanced conditions. Long-term charge balancing is achieved by a cause-based PI-controlled offset compensation of the remaining electrode voltage. A $G_{\mathrm{ m}}$ of only 1.5 nS offers a large (8 ms) time constant with only a 12 pF capacitor and leads to the first integrated PI-controller for offset compensation in neural implants. Instantaneous autonomous balancing is realized by a second concept, the consequence-based Inter-Pulse Charge Control. It uses a class-B architecture to supply the compensation currents. Thus, no additional references are required to define the safety window of the remaining electrode voltage. It consumes 31.8 ${\mu }\text{W}$ in the idle state, while the delivered output power can be as high as 11 mW. The two complementary approaches can be combined to one system, providing the opportunity to achieve a better performance. The system consumes 56 ${\mu }\text{W}$ and features a 36% mismatch correction in biphasic stimuli amplitude, as well as an autonomous 100% charge removal at maximum compensation amplitudes of 500 ${\mu }\text{A}$ , which makes it a suitable complement to monophasic stimulators.

A 15-channel 30-V Neural Stimulator for Spinal Cord Repair.

This paper presents a 15-channel, 30-V, implantable current stimulator for restoring locomotion control after spinal cord injuries. The stimulator features performance specifications comparable to those of large desktop instrumentation: high linearity, high precision of the delivered currents, small channel-to-channel mismatches and a fast settling time of 0.3 μs. An ADC-based active charge balancing scheme using a digital PI (proportional-integral) controller was implemented in firmware.

Compact, Energy-Efficient High-Frequency Switched Capacitor Neural Stimulator With Active Charge Balancing.

Safety and energy efficiency are two major concerns for implantable neural stimulators. This paper presents a novel high-frequency, switched capacitor (HFSC) stimulation and active charge balancing scheme, which achieves high energy efficiency and well-controlled stimulation charge in the presence of large electrode impedance variations. Furthermore, the HFSC can be implemented in a compact size without any external component to simultaneously enable multichannel stimulation by deploying multiple stimulators. The theoretical analysis shows significant benefits over the constant-current and voltage-mode stimulation methods. The proposed solution was fabricated using a 0.18 μm high-voltage technology, and occupies only 0.035 mm2 for a single stimulator. The measurement result shows 50% peak energy efficiency and confirms the effectiveness of active charge balancing to prevent the electrode dissolution.

Modular Active Charge Balancing for Scalable Battery Packs

High-voltage battery packs consist of series-connected lithium-ion cells and require sophisticated battery management systems (BMSs) to maintain safe operating conditions. Active cell balancing is an important task of a BMS, performed in order to improve the usable capacity of the battery pack by equalizing the charge levels of individual cells. With the emerging trend of distributed BMS topologies, the associated balancing architectures are required to be modular, consisting of homogeneous units that minimize integration efforts. In this paper, we propose a modular active charge balancing architecture along with its control scheme for implementation toward such distributed BMSs. Compared with existing approaches, our proposed architecture provides increased charge transfer capabilities, with reduced hardware and control complexity. We propose a closed-form analytical model of the balancing architecture, which can be used to perform fast system-level simulation studies and design space exploration for analyzing efficient device combinations. A hardware implementation of the proposed balancing architecture is developed and measurements made with it are used to validate each part of our analytical model. Using the validated analytical model, we performed a case study, which shows that our proposed architecture provides a 14.5 % improvement in charge transfer efficiency compared with existing approaches.