Level Cascaded H-Bridge Multilevel Inverter Research Articles

A New Level Shifted Carrier Based PWM Technique for a Cascaded Multilevel Inverter Based Induction Motor Drive

The pulse width modulation (PWM) techniques are becoming the game changer for multi-pulse power converter fed multilevel inverter-based induction motor drive (IMD) due to their significant impacts on power quality. In this paper, a new level shifted carrier-based PWM technique is proposed for a 5-level cascaded H-bridge (CHB) multilevel inverter driven by a 36-pulse ac-dc converter based IMD. To meet the power quality demand of IEEE-519 at grid side, a modular transformer is used, and the transformer is coupled to form a 36-pulse ac-dc converter. A 5-level CHB multilevel inverter is utilized on the motor side, which uses the proposed carrier based PWM technique for switching action to ensure superior performance of the IMD. The proposed PWM technique is named as third-harmonic injected inverted sinusoidal carrier PWM (THI2SCPWM), which utilizes 3 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rd</sup> harmonic injection principle with inverted sinusoidal signal to form the proposed carrier signal. The 5-level CHB inverter used in the IMD shows less power loss and total harmonic distortion (THD) with the proposed THI2SCPWM technique. Moreover, the IMD with the THI2SCPWM shows low stator voltage THD, stator current THD, and smooth dynamic response. Apart from these, the THI2SCPWM mitigates the torque ripple of the IMD. The motor drive system with the THI2SCPWM technique is modeled and its performance is simulated on MATLAB/Simulink environment. A scaled down experimental setup is utilized to validate the superiority of the proposed PWM technique.

Comparative Study of Multiphase 5-Level Cascaded H-Bridge Multilevel Inverter System

In terms of cost and structural design, the cascaded H-bridge multilevel inverter (CHBMLI) has a significant advantage over diode clamped and capacitor clamped multilevel inverters. The total harmonic distortion (THD) of a 5-level CHBMLI system for three different phases (single-phase, three-phase, and six-phase system) is studied and compared in this work. As switching angles play a role in lowering THD, the switching angles for a 5-level CHBMLI are evaluated using four specific switching angle methods in the initial section of this paper. In the simulation of single-phase system, these angles are being utilized. The angles with the lowest THD value are chosen for three-phase and six-phase system simulation. Based on the findings, the higher phase of 5-level CHBMLI is more efficient in decreasing harmonics.

Design of Cascaded H-Bridge Multilevel Inverter Topology for Integrated Portable Power Pack Application

This paper presents the necessity of portable power supplies that can be carried and cater to all the users' demands. Since the energy storage of the portable power pack are coming from DC supply, it needs an inverter to convert the DC voltage into AC voltage. Most of the low-priced inverters in the market have a simple build and are inefficient, resulting in high THD that can cause the electrical appliance not to work properly. This project was focused on the most suitable inverter type where the cascaded H-bridge multilevel inverter with PWM switching technique was proposed. This type of inverter will produce a better THD and a higher output voltage level when the inverter level is increased. This theory was proved where 3-level, 5-level and 7-level of Cascaded H-Bridge Multilevel Inverter has a 52.05 %, 29.98 % and 21.94 % of voltage THD. These results prove that by increasing the output voltage level can reduce the voltage THD. For the hardware implementation, a 5-Level Cascaded H-Bridge Multilevel Inverter with PWM switching technique is chosen because it has a lower voltage THD compared to 3-Level Cascaded H-Bridge Multilevel Inverter and at the same time use less of semiconductor devices compared to 7-Level Cascaded H-Bridge Multilevel Inverter and has fewer semiconductor losses compared to the inverter with SPWM switching technique. The voltage THD of circuit models hardware when reaches 24 V_pk is 28.3 % which is slightly better to simulation result, 29.98 %. This inverter was then connected with a step-up transformer with a ratio of 1:10 to reach standard electrical voltage supply in Malaysia of 230 V_rms with a voltage THD of 28.4 % without load and 30 % with load. This proves that the circuit model can work properly as the 5-Level Cascaded H-Bridge Inverter simulation and hardware results show a good agreement.

THD Analysis of a Seven, Nine, and Eleven Level Cascaded H-Bridge Multilevel Inverter for Different Loads

A multilevel inverter is implemented for generating the required staircase AC voltage of output from various steps of voltages of DC sources. The multilevel inverter gives a better harmonic spectrum and a compatible quality of output. This article delves into an analytical analysis of the total harmonic distortion (THD) of different multilevel inverters which employ a multicarrier PWM technique. This technique is implemented for operating the switches at their respective angle of conduction. This paper deals with various cascaded H-Bridge multilevel inverters (CMI) with various loads that are modelled by implementing the MATLAB/Simulink platform. The output gives a better result of the proposed model in terms that it is helpful towards reducing the THD and the losses of switching.

Simulation of Seven and Nine Level CHBMLI with Elliptical Phase Disposition PWM Technique

Electric vehicles are in demand in recent days due to depleting conventional energy resources. Electric vehicles which are environmental friendly are set to increase on road in coming days. The Electric vehicles which consist of electric drive systems are made up of electric motors, inverters and batteries. There is a need to increase their output quality while decreasing their size and cost. The multilevel inverter plays a vital role in improving the quality of the output voltage of the inverter. This paper presents the implementation of Elliptical Phase Disposition Pulse Width Modulation (EPD PWM) technique for higher level of Cascaded H-Bridge Multi Level Inverter (CHBMLI). The performance of 5, 7 and 9-level CHBMLI with proposed EPD PWM scheme is analyzed for three-phase RL-load. The simulation results prove that the voltage %THD reduces from 28.09 to 12.85 to 9.69 and current %THD reduces from 25.58 to 10.22 to 9.42 as the number of inverter output level increases from 5-7-9 level respectively. The simulation is carried out on MATLAB/ SIMULINK platform and the results were compared with conventional method to validate the proposed scheme. The simulation results prove that the novel EPD-PWM technique can be used to effectively control the CBHMLI.

Fifteen Level Cascaded H-Bridge Multilevel Inverter Fed Induction Motor

In power electronics, Multilevel Inverter (MLI) plays very important role. It has spectacular applications in the field of high power &amp; medium voltage energy control. The simulation of “Fifteen Level Cascaded H-Bridge Multilevel Inverter (MLI) Fed Induction Motor” is studied in this paper. The MLI’s are used to get high magnitude output voltage with reduced harmonic distortion. The reduction of harmonic distortion and the purity of the output waveform when compared with five level and nine level multilevel inverters is seen in this paper.

Experimental Investigation on the Performances of a Multilevel Inverter Using a Field Programmable Gate Array-Based Control System

The Field Programmable Gate Array (FPGA) represents a valid solution for the design of control systems for inverters adopted in many industry applications, because of both its high flexibility of use and its high-performance with respect to other types of digital controllers. In this context, this paper presents an experimental investigation on the harmonic content of the voltages produced by a three-phase, five level cascaded H-Bridge Multilevel inverter with an FPGA-based control board, aiming also to evaluate the performance of the FPGA through the implementation of the main common modulation techniques and the comparison between simulation and experimental results. The control algorithms are implemented by means of the VHDL programming language. The output voltage waveforms, which have been obtained by applying to the inverter the main PWM techniques, are compared in terms of THD%. Simulation and experimental results are analyzed, compared and finally discussed.

Modeling and Simulation of Nine-Level Cascaded H-Bridge Multilevel Inverter

This paper analyzed a single phase nine level cascaded h-bridge multilevel inverter (CHMLI) topology in which requires lesser number of components and easier to control if compared to other methods. The inverter of different voltage levels (up to 9-Levels) are designed and simulated using MATLAB Simulink. A Level Shifted Multi-Carrier PWM control scheme is used to control the operation of the power switches for CHMLI topology. The results are compared in terms of THD. The value of THD is found to be reduced as the number of voltage level of CHMLI is increased.

Comparative Analysis of Various Z-source Based Five Level Cascaded H-bridge Multilevel Inverter

Z-source based multilevel inverters are the recent topologies as they have boosting ability and near sinusoidal output waveforms. This paper proposes different inverter topologies such as Z-source multilevel inverter and quasi Z-source multilevel inverter. This paper also deals with switched inductor and improved switched inductor topologies with quasi Z-network. The proposed switched inductor system reduces the voltage stresses caused by capacitors, power devices and diodes. In addition to multilevel inverter advantages, the proposed configuration employs Z-source inverter advantages. The Z-source inverter as compared to the traditional inverter is less costly, less complex, more efficient and more reliable. The performance of the proposed configurations is analysed by varying passive elements in impedance network and is simulated in MATLAB/SIMULINK. Phase disposition (PD) pulse width modulation (PWM) technique is applied on the proposed configurations and performance parameters are measured by the fast Fourier transform FFT analysis. The object of this paper is to develop an inverter which is used for variable speed drives with increase in output voltage by eliminating transformer and filter circuit. The performance is checked with standared parameter of the inverter.

Simulation Analysis of Three, Five, Thirteen, Fifteen, Twenty One and Thirty One Level Cascaded H-Bridge Multilevel Inverter

Simulation Analysis of Three, Five, Thirteen, Fifteen, Twenty One and Thirty One Level Cascaded H-Bridge Multilevel Inverter

Performance of Interconnection and Damping Assignment Passivity-Based Controller on Inverter Circuits

This paper presents an extension work on the application of interconnection and damping assignment passivity-based controller (IDA-PBC) from the conventional H-bridge inverter to a 5-level Cascaded H-bridge Multilevel Inverter (CHMI). With the controller, the inductor current and the voltage capacitor track the desired reference of the inverter to ensure that the output voltage maintains its regulation while the Total Harmonic Distortion (THD) is kept at low levels with fast transient response. It is designed based on the Port-Control Hamiltonian theory exploiting the dissipation properties of the averaged model of inverter circuits. The results obtained have proven that the IDA-PBC previously developed for the H-bridge inverter can be easily extended and applied to the CHMI circuit. The simulation results showed that the IDA-PBC is able to maintain the output voltage regulation in both circuits in the case of no-load to full-load condition, load uncertainty, and structural uncertainty while maintaining THD of less than 5%. However, in all cases, CHMI has shown better performance in terms of THD percentage and transient response compared to the H-bridge inverter, which are 290 µs and 150 µs respectively.

A Overlapping Carrier Based SPWM for a 5-Level Cascaded H-bridge Multilevel Inverter

This paper proposes a switching control for a cascaded H-bridge inverter structure with reduced switches which is used to improve the THD performance of a single phase five level CHB MLI. The multi level inverter is simulated for the conventional carrier overlapping APOD and the proposed carrier overlapping APOD Pulse Width Modulation (PWM) switching control technique. The total harmonic distortion (THD) of the output voltages are observed for both PWM control techniques. The performance of the symmetric CHB MLI is simulated using MATLAB-SIMULINK. It is observed that the proposed carrier overlapping APODPWM provides output with relatively low THD as compared to the conventional carrier overlapping APODPWM.

Simulation of Five Level Cascaded H-Bridge Multilevel Inverter with and without OTT Filter

This paper deals with the five level cascaded H-bridge multilevel inverter using sinusoidal pulse width modulation (SPWM) technique, with and without OTT filter. The MLI converts DC input voltage into staircase AC output voltage. The distortion in AC output voltage of the inverter can be reduced using OTT filter. The total harmonic distortion of 0.62 produces from five levels MLI can be reduced to 0.10 using OTT filter. Thus, the reduced total harmonic distortion (THD) is achieved. The Matlab–Simulink is used to simulate and analyze the results.

A Overlapping Carrier Based SPWM for a 5-Level Cascaded H-bridge Multilevel Inverter

&lt;p&gt;This paper proposes a switching control for a cascaded H-bridge inverter structure with reduced switches which is used to improve the THD performance of a single phase five level CHB MLI. The multi level inverter is simulated for the conventional carrier overlapping APOD and the proposed carrier overlapping APOD Pulse Width Modulation (PWM) switching control technique. The total harmonic distortion (THD) of the output voltages are observed for both PWM control techniques. The performance of the symmetric CHB MLI is simulated using MATLAB-SIMULINK. It is observed that the proposed carrier overlapping APODPWM provides output with relatively low THD as compared to the conventional carrier overlapping APODPWM.&lt;/p&gt;

THD Analysis of an Overlapping Carrier Based SPWM For a 5-Level Cascaded H-bridge Multilevel Inverter

This paper analyzes the Total Harmonic Distortion (THD) performance of a single phase 5-level CHB MLI. The multi level inverter is simulated using the carrier overlapping APOD Pulse Width Modulation (PWM) switching control technique. The total harmonic distortion (THD) of the output voltage is observed for the PWM control technique at varying modulation index of 0.7-1.0. The performance of a 5-level CHB MLI is simulated using MATLAB/SIMULINK. It is observed that the carrier overlapping APODPWM provides output with relatively low THD.