3L-NPC Topology Research Articles

Nonlinear control of single stage grid-tied photovoltaic systems based on a 3L-NPC topology

In this paper, the problem of controlling the single-phase grid connected to the photovoltaic system based on a 3-level half-bridge neutral point inverter with an L-filter is presented. The proposed controller is designed to meet three main control objectives: (i) regulating the capacitor voltages at the inverter input to a reference provided by the MPPT block to achieve maximum power, (ii) satisfying the power factor correction (PFC) requirement, (iii) balanced power exchange by regulating the two capacitor voltages at the inverter input to the same voltage value. The controller includes three control loops, namely, the inner current tracking loop designed with the integral sliding mode approach, the outer voltage regulation loop designed with the filtered PI controller, and the voltage balance loop designed with the PI controller. The performance, efficiency, and robustness of the proposed control strategies with respect to climate change are demonstrated through simulation in the Matlab/Simulink environment.

Modeling of MVDC Multidrive Systems for Power Quality Analysis

In a medium voltage direct current (MVDC) multidrive system, several power electronics converters share a common MVDC bus. The contribution of this article relies on the systematic modeling approach of MVDC multidrive systems for the analysis of the MVDC bus power quality. Particularly, the interaction between the harmonics injected by the converters at the dc-link (due to the switching and modulation) with the natural resonances of the MVDC system (due to the line impedances and converters’ bus capacitors) is the key point for the proposed power quality analyses. For that purpose, the analytical modeling of both, the MVDC bus system and the current harmonics injected at the dc-link by the MV converters (3L NPC topology) is addressed in this article. The signal power quality study can be conducted entirely in the frequency domain through the proposed modeling approach at a low computational cost. This article demonstrates the applicability of the methodology for a real case study based on a high-power medium-voltage 5.1-kV MVDC multidrive system.

Analysis and experimental validation of a controller for a single-phase active power filter based on a 3L-NPC topology

Summary In this paper, a controller for a shunt active power filter based on a 3-level neutral point clamped inverter is presented. The proposed controller guarantees compensation of harmonic and reactive powers caused by nonlinear loads connected at the point of common coupling. The controller comprises three control loops, namely, a current tracking loop, a voltage regulation loop, and a voltage balance loop. The current tracking loop is aimed to inject the appropriate current by means of the power inverter to compensate reactive power and harmonic distortion assuring a power factor close to unity. The voltage regulation loop is designed to assure that the DC-link reaches a desired constant voltage level, while the voltage balance loop is aimed to regulate each capacitor voltage on the DC-link towards the same voltage value. The performance of the proposed controller is experimentally validated on a 1 kW prototype.

Time-Offset Injection Method for Neutral-Point AC Ripple Voltage Reduction in a Three-Level Inverter

The purpose of neutral-point voltage balancing algorithms in the three-level neutral-point clamped (3L-NPC) topology is to eliminate the voltage unbalance of top- and bottom-side dc-link voltages (neutral-point voltage). These algorithms are divided into dc unbalance and ac unbalance compensation methods. The dc unbalance causes distortion of output currents; therefore, this problem has to be solved. The ac unbalance implies that there is an ac ripple in the top- and bottom-side dc-link voltages. In applications using 3L-NPC topology, a large dc-link capacitor value is required to mitigate this ac unbalance problem. As a result, the size and the cost of applications become large and expensive. In this paper, a compensation method for mitigating the ac unbalance of the neutral-point voltage is proposed, which causes the dc-link capacitor value to be small, when a carrier-based pulse width modulation method is applied. The proposed method compensates the ac unbalance of the neutral-point voltage by adding an optimal compensation value to the reference duty signals. This compensation value is calculated simply by currents and reference duty signals. The calculation process of the optimal compensation value is discussed, and the effectiveness of the proposed method is verified with simulations and experiments.

Modulation Methods for Three-Level Neutral-Point-Clamped Inverter Achieving Stress Redistribution Under Moderate Modulation Index

This letter investigates the loss and thermal behaviors of a three-level neutral-point-clamped (3L-NPC) inverter undergoing moderate modulation index, which is typically presented during minor voltage sags of the power grid or speed changes of the electric machines. A series of new space vector modulation methods is then proposed to relocate the thermal loading among the power devices. It is concluded that with some of the proposed modulation methods, the device loading in the 3L-NPC inverter can be effectively modified and optimized, and the junction temperature of the most stressed devices can be also relieved. The control ability of dc bus midpoint potential, which is one of the crucial considerations for the 3L-NPC topology, is also investigated when applying the proposed modulation methods.