The polyimide (PI) and photosensitive polyimide (PSPI) were always regarded as protecting layer or insulation layer in semiconductor industry due to its high-temperature resistance, outstanding mechanical properties, chemical and radiation resistance, and excellent dielectric properties. The PI and PSPI had various usage methods and applications in organic light-emitting diode (OLED) display, integrated circuit (IC) and IC packaging based on its specific performance advantages. This paper introduced the usage method and application of PI film and PSPI in OLED display, IC fabrication and IC packaging. For PI film, the usage method including transfer patterning from a PR patterning layer and the laser for patterning technology, the PI was usually regarded as flexible substrate in OLED devices and insulation layer in IC packaging. For PSPI, the usage method in-cluding forming patterning based on photolithography technology, the PSPI was usually regarded as planarization layer, pixel definition layer and pixel supporting layer in OLED display, the PSPI was also regarded as protecting layer and insulation layer in IC fabrication and packaging.

Based on the advantages of higher output efficiency, higher utilization, higher production, lower cost, no requirement for advanced process, higher device density, improved electrical performance and enhanced thermal management, there are many foreign manufacturers and domestic manufacturers all have developed the fan out panel level packaging (FOPLP) technology in the past ten years. The related technologies including die first & face down for FOPLP technology, die first & face up for FOPLP technology and RDL first for FOPLP technology have been developed. The challenges including die shift, panel warpage, RDL process capability, relayed equipment, and market share also need to be considered for a long time along with the developing of FOPLP technology. During the whole process of FOPLP packaging, organic materials including epoxy molding compound (EMC), dry film, photosensitive polyimide (PSPI) and photoresist (PR) were applied to guarantee the performance of packaged chips.

This paper presents the latest status of the open source advanced TCAD simulator called Nano-Electronic Simulation Software (NESS) which is currently under development at the Device Modeling Group of the University of Glasgow. NESS is designed with the main aim to provide an open, flexible, and easy to use simulation environment where users are able not only to perform numerical simulations but also to develop and implement new simulation methods and models. Currently, NESS is organized into two main components: the structure generator and a collection of different numerical solvers; which are linked to supporting components such as an effective mass extractor and materials database. This paper gives a brief overview of each of the components by describing their main capabilities, structure, and theory behind each one of them. Moreover, to illustrate the capabilities of each component, here we have given examples considering various device structures, architectures, materials, etc. at multiple simulation conditions. We expect that NESS will prove to be a great tool for both conventional as well as exploratory device research programs and projects.