- New
- Research Article
- 10.1002/cta.70431
- Apr 13, 2026
- International Journal of Circuit Theory and Applications
- Jian Zheng + 5 more
ABSTRACT In three‐phase two‐level inverters, the virtual space vector modulation (VSVM) has attracted widespread attention due to its ability to reduce the amplitude of common‐mode voltage and third harmonics. However, there are still problems such as rich harmonic components of common‐mode voltage and a high rate of occurrence of amplitude and direction changes. To address these issues, an improved VSVM method is proposed. By analyzing the vector synthesis and common‐mode voltage characteristics of the classic VSVM, the basic vectors corresponding to the virtual vector and the virtual zero vector are optimally sorted, so that the common‐mode voltage waveform of each switching cycle is the same, which are all single rectangular waves. The common‐mode harmonic, dead time compensation, and switching losses of the proposed method are further analyzed. Simulations and experiments are conducted in an inverter‐permanent magnet synchronous motor system. The results show that, compared with the classic VSVM, the proposed method reduces the rate of occurrence of amplitude and direction changes by three times while maintaining the low amplitude of the common‐mode voltage. It completely eliminates the baseband harmonics and sideband harmonic components and reduces the peak value of the high‐frequency segment of the common‐mode voltage by an average of 6 dB. Meanwhile, the performance of line voltages, line currents, torque, and speed remains excellent. This method can more effectively suppress common‐mode current without increasing the system volume and cost, which is beneficial for the design of common‐mode filters and provides a reference for the research of other common‐mode suppression PWM methods.
- New
- Research Article
- 10.1002/cta.70446
- Apr 13, 2026
- International Journal of Circuit Theory and Applications
- Jianbo Jiang + 5 more
ABSTRACT The large‐scale development of the electric vehicle industry has caused a significant rise in the stock of retired power batteries (RPB). Their cascaded use can reveal remaining value, but inconsistency remains a major obstacle. While cascaded H‐bridge (CHB) inverters and modular multilevel converters (MMCs) allow for extensive battery integration and split management, their limited system control options make it hard to fully address battery inconsistencies. Based on this, this paper introduces a modular topology using transformer balancing, which primarily provides interphase and intraphase power balancing as well as battery state‐of‐charge (SOC) balancing. Additionally, this paper uses clustering algorithms for classification optimization to reduce control complexity. Lastly, a hardware‐in‐the‐loop semiphysical simulation platform was developed to experimentally verify the effectiveness of the proposed modular converter and control strategy.
- New
- Research Article
- 10.1002/cta.70438
- Apr 13, 2026
- International Journal of Circuit Theory and Applications
- Kai Zhou + 2 more
ABSTRACT This paper focuses on the integration technology of on‐board charging system and on‐board DC/DC converter. A multiresonant three‐port AC/DC converter is designed and the topological structure, working principle and key features of the front‐stage and rear‐stage converters are analyzed. According to the design indicators, the configuration and optimization of parameters for critical components including inductors, capacitors, transformers, and switching transistors are completed. The fundamental harmonic approximation (FHA) is used to study the influence of relevant parameters on the voltage gain characteristics of the charging system. In view of the two‐stage cascading characteristics of the system, the modulation approach of PWM control is adopted in the front stage and PFM control in the rear stage, and the relevant parameter design is completed through small‐signal modeling. The inverter circuit is integrated with the charging circuits on the high‐ and low‐voltage sides by using a three‐port transformer, replacing the traditional split structure with an integrated structure, which can charge both high‐voltage power batteries and low‐voltage storage batteries simultaneously. The high‐voltage side charging circuit can achieve bidirectional energy flow, and its forward and reverse operation characteristics are consistent, greatly simplifying the control difficulty. This multiresonant topology achieves concurrent delivery of fundamental and third harmonic spectral components, achieving the required voltage gain within a certain range of AC input frequency variation. Based on theoretical analysis and characteristic research, an experimental prototype with a 400‐V high‐voltage output and a 13.8‐V low‐voltage output was trial‐produced. The results of the experiment demonstrate that the system can achieve bidirectional energy flow, meet the requirements of wide gain and high‐efficiency operation, and verify the correctness of the design.
- New
- Research Article
- 10.1002/cta.70426
- Apr 4, 2026
- International Journal of Circuit Theory and Applications
- Bahadır Özkan + 1 more
ABSTRACT In this paper, a highly linear passive attenuator and mixer are presented for use in an observation receiver path for digital predistortion (DPD) applications in a 130‐nm SOI CMOS process. This circuit operates at a carrier frequency of 5.9 GHz. The attenuator design comprises variable resistors, capacitors, and an on‐chip transformer design. The attenuator provides the ability to change the level of attenuation, spanning from 28 to 41 dB. This adjustment can be made in steps of 0.85 dB using a 4‐bit input control word. The mixer design employs a current‐mode double‐balanced passive topology to enhance linearity. The mixer design demonstrates a single‐sideband integrated noise figure of 29 dB with a total conversion gain of 2.8 dB. The value for the combined attenuator and mixer is recorded as 9.2 dBm in the observation receiver. The design consumes a total current of 7 mA from a 1.2‐V supply. The area of the designed circuit is 0.33 mm.
- New
- Research Article
- 10.1002/cta.70421
- Apr 4, 2026
- International Journal of Circuit Theory and Applications
- Chenyang Xia + 6 more
ABSTRACT In bidirectional inductive power transfer (BIPT) systems, coil misalignment and power regulation are unavoidable problems that compromise ideal operational conditions, degrading overall system efficiency. Therefore, this paper proposes a multi‐degree‐of‐freedom (MDOF) cooperative control strategy for series–series (S‐S) compensated BIPT systems. Through determination of optimal multivariate combinations, high‐efficiency operation is maintained under dynamic power regulation and coil misalignment conditions. Firstly, the structure and principle of BIPT system are analyzed. Secondly, a mathematical model is established to determine the optimal operation condition. Thirdly, the MDOF constraints are derived, and the fundamental theory of the proposed control strategy is elaborated. Finally, an 800 W BIPT prototype is developed to validate the effectiveness of the proposed control strategy. Experimental results demonstrate that, compared with the traditional control methods, the proposed control strategy has a higher DC‐DC efficiency within the power range of 200 to 800 W and an horizontal offset of 0 to 16 cm.
- New
- Research Article
- 10.1002/cta.70425
- Apr 4, 2026
- International Journal of Circuit Theory and Applications
- Yiming Zhang + 7 more
ABSTRACT In a strongly coupled wireless power transfer (WPT) system, the secondary‐side uncompensated structure can be applied, forming a series‐none (S‐N) topology to reduce the volume and cost of the receiver. The compensation of the S‐N topology depends on the coupling coefficient, which can be varied with offset. This paper proposes a parameter identification method for the S‐N topology to retain a constant‐voltage (CV) output with offset. A method for identifying the coupling coefficient and the load resistance is proposed by detecting the primary‐side voltage and current and then adjusts the resonant frequency to achieve a CV output. The system can realize a stable CV output under arbitrary load conditions and offsets. A WPT experimental prototype is built to verify the accuracy of the parameter identification. Under offset conditions, the maximum error of the coupling coefficient identification is 1.51%, and the load resistance identification accuracy is maintained between 93.93% and 99.1%, indicating high identification accuracy. A CV output can be achieved with a voltage fluctuation of 4.67%.
- New
- Research Article
- 10.1002/cta.70409
- Apr 4, 2026
- International Journal of Circuit Theory and Applications
- Satoru Iwata + 1 more
ABSTRACT This paper investigates the index of differential‐algebraic equations (DAEs) that arise in modeling of electric circuits with gyrators. A gyrator is a two‐port network element whose constitutive equations are defined by a skew‐symmetric matrix. While the index analysis of DAEs in circuit simulation has been extensively studied, the existing characterizations are not applicable to circuits that include gyrators. For linear time‐invariant circuits with gyrators, we analyze the index of DAEs using a matroid‐theoretic approach. We show that the problem of determining whether DAEs arising from the hybrid analysis have index at most one or not is reduced to a linear matroid parity problem. We also provide a structural characterization for DAEs arising from the modified nodal analysis (MNA), and extend it to nonlinear circuits, generalizing a structural characterization that is well known in the index analysis of the MNA models.
- New
- Research Article
- 10.1002/cta.70415
- Mar 27, 2026
- International Journal of Circuit Theory and Applications
- Jahera Shaik + 1 more
ABSTRACT The objective of this research article is to probe the functioning of a five‐phase induction motor (FPIM) under the condition where one stator phase winding is disconnected. The stator winding can be connected in three possible ways, star, pentagon, and pentagram. The main aim is to develop a mathematical model for open‐phase fault in pentagon‐connected FPIM (PC‐FPIM). An empirical model is proposed and developed for evaluating the voltage across the open‐phase during fault. It also delves into the examination of performance parameters of the star‐connected FPIM (SC‐FPIM) and PC‐FPIM configurations during open‐phase fault. At full load, the torque ripple in the SC‐FPIM reaches 1.26 pu, whereas in the PC‐FPIM, it is limited to only 0.03 pu. This corresponds to an increase of about 126% in the star configuration, while it is only around 3% in the pentagon configuration. Furthermore, across all load conditions (20%–100%), the torque ripple in the pentagon configuration remains negligible, demonstrating its superior fault‐tolerant capability. The modeling of the fault is carried out using the back‐EMF approach, and this methodology is implemented in the MATLAB/Simulink environment for simulation. Additionally, the goal is to implement an appropriate fault‐tolerant control approach (FTCA) aimed at restoring the unbalance in the system caused after the occurrence of the fault. The reference currents required for the hysteresis controller are adjusted postfault by altering the components. This control is implemented in MATLAB/Simulink and is connected to hardware using dSPACE Real‐Time Interface. The simulation results accurately reflect the conditions associated with faults. The experimental prototype includes a five‐phase voltage source inverter (VSI) with protection circuits, current sensor board, and FPIM equipped with encoder. An open‐phase fault is observed in the machine, and the results recorded are in compliance with the simulation results achieved.
- New
- Research Article
- 10.1002/cta.70396
- Mar 27, 2026
- International Journal of Circuit Theory and Applications
- Zihan Xu + 3 more
ABSTRACT Deterministic optimization methods offer superior efficiency and reproducibility compared with stochastic approaches. This paper presents an improved deterministic single‐objective (DSO) sizing algorithm that enhances computational efficiency while effectively handling design constraints. Building upon this framework, a deterministic multi‐objective (DMO) sizing algorithm is further developed by integrating a modified weighted sum method to enable high‐quality Pareto front exploration. Experimental results show that the proposed DSO sizing algorithm surpasses the best‐performing baseline in optimization efficiency, yielding improvements of 21.48% and 76.97% for the two‐stage and three‐stage Op‐Amps, respectively. Similarly, the proposed DMO sizing algorithm outperforms NSGA‐II in the spacing metric, achieving improvements of 80.27% and 73.29% for the two‐stage and three‐stage Op‐Amps, respectively, while also producing a higher‐quality Pareto front. These results demonstrate that the proposed deterministic sizing algorithms achieve reliable convergence, efficient design space exploration, and strong competitiveness against existing optimization methods. By providing repeatable, physically interpretable, and computationally efficient optimization results, the proposed deterministic sizing algorithm enables designers to systematically explore performance trade‐offs and make informed decisions in complex analog IC multi‐objective optimization scenarios.
- New
- Research Article
- 10.1002/cta.70416
- Mar 25, 2026
- International Journal of Circuit Theory and Applications
- Xin Zhang + 2 more
ABSTRACT Aiming at the limitations of traditional dissolved gas analysis methods in transformer fault diagnosis, a multimodal fault diagnosis method integrating quaternions and time‐series imaging is proposed. First, the Raman angle sum field is adopted to capture the global trend and phase relationship, and the Markov transition field is used to encode the local state transition and nonstationary dynamics, achieving the joint modeling of the global and local time structures. Then, a four‐branch feature extractor combining a multi‐scale pulse‐coupled neural network and multi‐scale spatial channel attention is constructed to learn multi‐scale saliency and spatial channel attention representations. Second, to simulate the geometric coupling between branches, quaternion representation and quaternion convolution are introduced, and multi‐head cross‐attention is adopted to enhance cross‐modal interaction and noise suppression. Finally, the hybrid strategy optimizes hyperparameters, the distributed adaptive Dragonfly algorithm performs global parameter search, while Bayesian optimization refines key configurations. The experimental results show that this method improves the accuracy and effectiveness of fault diagnosis.