Abstract
Presented is a circuit implementation for the discrete-time zigzag map, which exhibits high speed, low power consumption, and above all resilience to process variations. Circuit parameter variations result in alteration of the chaotic map parameters, such as the slope and the location of the breakpoints in the map, which in turn degrade the randomness of the generated bit sequence or even cause the saturation problem when the map is used in a truly random number generator (TRNG). Because of the resilience of the presented circuit implementation to process variations, a truly random sequence is obtained that passes all the TRNG statistical test suites, after very simple post-processing of the output bit sequence.
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