Yield improvement of 0.13μm Cu/low-k dual-damascene interconnection by organic cleaning process

Abstract

Cu/low-k dielectrics are required to reduce resistance-capacitance (RC) delay and parasitic capacitance at the back-end-of-line (BEOL) interconnection. Integration of Cu/low-k dielectrics (black diamond) for BEOL interconnection in 0.13μm technology has gained wide acceptance in the microelectronics industry in recent years. In this article, the authors discuss the process-integration issues of 0.13μm Cu/low-k dual-damascene integration for static random access memory (SRAM) device yield. The same scheme of 0.13μm Cu/fluorinated silicate glass–based device was used for the full process of making a low-k based device. Black diamond was used as a low-k material with a dielectric constant of 2.95. To reduce the damage of low-k and improve the yield of a low-k based device, H2O ashing, organic cleaning, and reduced down pressure in chemical-mechanical planarization were selected for the study. Specifically, the cleaning process after the ashing process was very effective for the removal of organic residues from via, trench, and surface contaminants. There was an increase of 40.79% in SRAM device yield compared to the low-k based device without the organic cleaning chemical process. As a result, the authors successfully integrated a 0.13μm Cu/low-k dual-damascene interconnection with excellent yield performance after the improving process of organic cleaning.