Abstract
Being able to continuously feed data to the processing nodes is one of primary problems in parallel data processing. Parallel memories increase memory bandwidth with several memory modules working in parallel and feed the processor with only necessary data. The Configurable Parallel Memory Architecture (CPMA) enables a multitude of access formats and module assignment functions to be used within a single hardware implementation, which has not been possible in prior embedded parallel memory systems. In this paper, a general XOR-scheme implementation for a previously implemented CPMA is presented. Any XOR-scheme can be used for the distribution of data to the memory modules with the introduced implementation. Results show significant reduction in the overall memory accesses, which can be viewed as one of the key approaches to solve the processor-memory performance bottleneck.Key wordsconfigurable parallel memory architectureXOR-schemesmodule assignment functionconflict free access
Sign-in/Register to access full text options 
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
