Abstract

Plasma enhanced atomic layer deposition (PEALD) of TaN demonstrated the significant benefit of lowering via resistance in back-end-of-line (BEOL) dual damascene copper interconnects with a line width of 32 nm, although PEALD TaN possessed a much higher intrinsic resistivity, approximately 2000 μΩcm, compared to physical vapor deposition (PVD) of Ta-rich TaN with a value around 250 μΩcm. The mechanism of lowering via resistance was studied by X-ray characterization techniques such as X-ray fluorescence (XRF) and X-ray reflectivity (XRR). XRF analysis indicated the nucleation rate of PEALD TaN is higher on a metal surface compared to a dielectric surface. XRR analysis revealed a smoother and damage free surface between PEALD TaN and silicon oxide, while a rougher interface was formed between PVD TaN and silicon oxide. Via resistance reduction with PEALD TaN is suggested to be related to reduced physical damage at the via bottom.

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