Abstract

AbstractIn WSI, a single noise could disrupt the system. However, neither dual system nor triple system can be used as a countermeasure because WSI benefits from the use of a single wafer system. This paper presents a design procedure for noise‐tolerant systems in which multiple clock pulses and the features of the residue number system are effectively combined. The design sequence is as follows: (1) The system is designed based on the redundant residue number system. (2) The circuits corresponding to the digits of the residue number system are driven by the clock pulses, each of which has a different phase. (3) A circuit is applied which corrects the noise‐induced error through calculation of the remaining correct digits. The reliability of a nonrecursive digital filter is clearly improved by applying the given method. The reliability is, however, reduced by pipelining and the hardware upgrade needed for redundancy is limited to 31%. By applying the given method, coincident noise‐induced faults throughout the system are avoided and the redundant hardware is reduced. We have found the method suitable for noise‐tolerant systems design of WSI.

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