Write-aware memory management for hybrid SLC-MLC PCM memory systems

Abstract

In recent years, phase-change memory (PCM) has generated a great deal of interest because of its byte addressability and non-volatility properties. It is regarded as a good alternative storage medium that can reduce the performance gap between the main memory and the secondary storage in computing systems. To further reduce the bit cost of PCM, the development trend of PCM goes from single-level-cell (SLC) the multi-level-cell (MLC) technology. However, the worse endurance and the intolerable long write latency hinder a MLC PCM from being used as the main memory of computing systems. In this work, we propose a write-aware memory management design to facilitate enabling the use of hybrid PCM as main memory to achieve a better trade-off between the cost and the performance of PCM-based computing systems, where the hybrid PCM is composed of SLC PCM and MLC PCM. In particular, the proposed design can be seamlessly integrated into the inherent memory management of modern operation systems without additional hardware components. The capability of the proposed design was evaluated by a series of experiments, for which it was shown that the proposed design could greatly improve the read and write performance of hybrid PCM memory system up to 30%. At the same time, our proposed idea can significantly extend the lifetime of the investigated hybrid PCM architecture up to 1174 times, compared to existing approaches.