Abstract
The power delivery system (PDS), which plays a crucial role in guaranteeing the proper functionality of computing systems, has been a serious constraint on performance due to its significant power loss, especially for high-performance many-core processors. As the PDS design is usually optimized to provide power to the target chip at its best performance level, the energy efficiency can be notably degraded when the workload of the processors is highly dynamic. Therefore, dynamically adjusting the PDS to adapt to the run-time chip workloads are expected to be beneficial. In addition, the introduction of on-chip voltage regulators (VRs) has also significantly broadened the design space of PDS. In this paper, we present a workload-aware quantized power management scheme to dynamically manage the PDS in order to improve system energy efficiency. VRs at different stages are scheduled as online or offline based on chip workload estimation and prediction. The simulation results show that with the proposed scheme, a hybrid PDS with on/off-chip VRs can achieve 74.6% overall efficiency on average, 12.7% higher than a conventional PDS with one off-chip VR. The proposed scheme also shows its potential advantage in improving system energy efficiency with large-scale many-core processors and with more advanced processor technology nodes.
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