Abstract
Manufacturers of the emerging 3D NAND market are working to continually add more memory capacity by increasing the number of layers in the device stacks. As the device stacks get taller, the manufacturers face many challenges for creating the devices with very high aspect ratios (HAR). In order to monitor and improve the processes, information is required on the critical dimensions through the device height. A fully automated workflow solution has been developed to address an emerging market need for critical 3D metrology of advanced NAND structures. The sample is prepared using a Plasma Dual Beam with the PFIB performing a diagonal PFIB mill, 38 degrees from the wafer surface normal, yielding a sloped trench such that the sample is oriented for top down SEM inspection using a dynamically focused SEM to observe the structures from the top of the trench to the bottom of the trench. Automated metrology using Metrios RE software is subsequently performed on each of the images to determine critical dimensions (CDs) of the 3D NAND channels (major/minor axis length, eccentricity, RMS Deviation). In a 5 um image there is a potential to measure thousands of devices. Plasma FIB offers the ability to perform larger mills in less time when compared to Ga+ FIB. The data is sorted such that the CDs are averaged as a function of row for devices located at continuous depths and exported in comma separated value (.CSV) format. Simple data analysis yields charts which exhibit how the critical dimensions, which affect device performance, vary over the depth of the device stack or location on the sample. The main critical dimensions reported are: the average device area, eccentricity, Major and Minor axis lengths and the RMS deviation % from an ellipse fit. This technique has been successful for characterization of structures up to 10 um tall and has potential to scale further as device dimensions grow. The workflow solution utilizing a plasma dual beam to perform the diagonal mill allows the manufacturer to characterize device structures through the device stack in under 2 hours, a much higher throughput when compared to a deprocess and inspect approach, enabling enhanced process monitoring and control in the fab environment. The data presented here is from a commercially available SK Hynix 1TB Gold hard drive 3D NAND chip.
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