Abstract
To alleviate the complex communication problems arising in the network-on-chip (NoC) architectures as the number of on-chip components increases, several novel interconnect infrastructures have been recently proposed to replace the traditional on-chip interconnection systems that are reaching their limits in terms of performance, power and area constraints. Wireless NoC (WiNoC) is among the most promising scalable interconnection architectures for future generation NoCs. In this study, the authors first provide a general description of the WiNoC architecture. Then, they discuss the research problems under five categories: topology, routing, flow control, antenna and reliability. Open research issues for the realisation of the WiNoC are also discussed.
Highlights
As the processor architecture enters the multi-/many-core era, the interconnection and communication among the on-chip components are playing major roles in defining the performance, area, power consumption and reliability of the entire chip
In most of today’s Wireless NoC (WiNoC) architectures [10,11,12], the wireless links are commonly used as highways between long-distance nodes with low transmission latency and less power dissipation
Based on the fact that the number of available channels per link is usually less than the flit width (e.g. 32 bits), Ganguly et al [12] proposed a time division multiplexing scheme to send whole flit by using a small number of channels simultaneously
Summary
As the processor architecture enters the multi-/many-core era, the interconnection and communication among the on-chip components are playing major roles in defining the performance, area, power consumption and reliability of the entire chip. The network-on-chip (NoC) architectures have been proposed to replace the conventional global interconnections that will have severe problems because of the scalability and high-bandwidth requirement of the multi-/many-core chips [1,2,3,4]. Wireless NoC (WiNoC) is among the most promising scalable interconnection architectures for future generation NoCs. Owing to the invention of different types of on-chip antennas [7,8,9], the on-chip wireless communication becomes feasible to build the WiNoCs. In the WiNoC architecture, the conventional wired links, for example, the links in a 2D mesh topology, are replaced by the wireless links. The WiNoC designs are newly emerging ideas, some researchers are currently engaged in developing different types of WiNoCs. In this paper, we present a survey of WiNoC designs proposed so far.
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