Width dependence of drain current and carrier mobility in gate-all-around multi-channel polycrystalline silicon nanowire transistors with 10 nm width scale

Abstract

The width dependences of characteristics of gate-all-around (GAA) polycrystalline silicon (poly-Si) transistors with 10 nm scale width were systematically investigated. The fabricated 14 nm wide GAA multi-channel poly-Si transistors exhibited excellent electrical properties including small subthreshold swing (105 mV/decade) and high Ion/Ioff ratio (∼108). Drain current normalized to effective width increases with decreasing nanowire width. It is found by the advanced split capacitance–voltage technique that both inversion carrier density and mobility are enhanced in the narrower nanowires and that the corner effect plays an important role in the drain current enhancement.