Abstract
Chip-scale widely-tunable lasers are important for both communication and sensing applications. They have a number of advantages, such as size, weight, and cost compared to mechanically tuned counterparts. Furthermore, they allow for integration in more complex integrated photonic chips to realize added functionality. Here we give an extensive overview of such lasers realized by utilizing ring resonators inside the laser cavity. Use of ring resonators for tuning allows for wide-tunability by exploiting the Vernier effect, and at the same time improves the laser linewidth, as effective cavity length is increased at ring resonance. In this review, we briefly introduce basic concepts of laser tuning using ring resonators. Then, we study a number of laser cavity configurations that utilize two ring resonators, and compare their tuning performance. We introduce a third ring resonator to the laser cavity, study three different cavity configurations utilizing three ring resonators, and select the optimal one, for which we show that laser tuning is straightforward, provided there are monitor photodetectors on-chip. Finally, we give a literature overview showing superior linewidth performance of ring-based widely-tunable lasers.
Highlights
Chip-scale widely-tunable lasers have been of interest for some time [1]
We have presented an extensive overview of chip-scale widely-tunable lasers that use ring resonators for tuning and filtering out a single longitudinal mode
Wide-tunability is commonly achieved by utilizing the Vernier effect, where two or more rings have slightly different radii
Summary
Chip-scale widely-tunable lasers have been of interest for some time [1]. Applications range from communications, especially wavelength-division multiplexing systems (WDM), to a number of sensing applications, such as wavelength-steered light detection and ranging (LIDAR)for autonomous driving [2]. Photonic integrated circuits (PIC) can be realized in a number of platforms, but for efficient on-chip light generation, a direct bandgap semiconductor is needed. Most commonly called heterogeneous integration, bonds pieces of III/V materials on patterned Si wafer and processes them using the same lithography tools The advantage of this approach is that the alignment tolerances are significantly reduced, as devices are defined using lithography alignment marks after bonding of larger III/V pieces. All the devices demonstrated in this manuscript use III/V quantum wells bonded to patterned SOI wafers This approach gives the best of both worlds: high-gain from optimized III/V materials, and superior passive and waveguide technology of the SOI platform.
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