Abstract
Conventional harmonic mixer divide-by-3 ILFD has limited locking range. This letter shows a wide locking range ÷3 ILFD designed with the enhanced 2nd harmonic technique. The proposed ILFD is based on a cross-coupled voltage-controlled oscillator (VCO) and was implemented in the TSMC $0.18 \mu \!\!\text{m}$ 1P6M CMOS process. At the drain-source bias $V_\mathrm{DD}$ of 0.8 V and at the incident power of 0 dBm, the locking range is 4 GHz (50%), from the incident frequency 6 GHz to 10 GHz. The core power consumption is 7.72 mW and the die area is $0.939\times 0.885 \text{mm}^{2}$ .
Published Version
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