Abstract
This paper presents a new wideband CMOS transimpedance amplifier (TIA) with low power dissipation. The negative capacitance technique is employed which reduces the parasitic capacitance. Furthermore, capacitive feedback technique is used in order to introduce pole-zero cancellation. Both these techniques, lead to bandwidth extension. Mentor Graphics Eldo simulation tool is used for simulation of the proposed TIA in TSMC 0.18 µm CMOS technology with 50 fF input photodiode capacitance. The simulated results show the − 3 dB bandwidth of 10.1 GHz which is about 8.3 GHz larger than simple TIA, transimpedance gain of 45.75 dBΩ and input current noise is 7.5 pA/√Hz with power consumption of 0.81 mW.
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