Abstract

A major drawback of digital transmitters (DTX) is the absence of a reconstruction filter after digital-to-analog conversion which causes the baseband quantization noise to get upconverted to radio frequency and amplified at the output of the transmitter. In high power transmitters, this upconverted noise can be so strong as to prevent their use in frequency-division duplexing systems due to receiver desensitization or impose stringent coexistence challenges. In this paper, we describe a DTX that embeds mixed-domain multi-tap finite-impulse response (FIR) filtering with programmable analog sub-sample delays within a highly linear and mismatch-resilient switched-capacitor DTX architecture. It is shown that switched-capacitor power amplifiers (SCPA) in conjunction with transformer-based power combining are ideal candidates for embedding mixed-domain FIR filtering since the near-constant source impedance of the SCPA greatly aids in linear FIR summation thereby preserving the desired noise-shaping profile. Moreover, their excellent mismatch characteristics help in ensuring precise tap weights in the FIR which enhances noise suppression. The availability of multiple taps in this architecture also allows the synthesis of FIR configurations with wide notch bandwidths (BW). Theoretical analyses of this architecture and design trade-offs related to linearity, mismatch, output power, and efficiency are discussed. The implemented 65 nm CMOS prototype exhibits a peak output power of 30.3 dBm and a peak system efficiency of 34%, and achieves a noise floor of -149 dBc/Hz over a BW of 20 MHz at an offset of 135 MHz from a 2.23 GHz carrier while transmitting a 1.4 MHz 64-QAM signal with an average output power of 22 dBm.

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