Abstract

Wide-bandgap (WBG) transistors provide better switching performance and higher operating temperatures compared to state-of-the-art Si devices and are suited for high-frequency applications due to very short switching times. The main obstacle for implementation of WBG transistors at full potential is the high-frequency oscillation in voltage and current during switching transients. Oscillations arise from resonance due to parasitic and device inductances and capacitances. Introduction of WBG transistors depends on the elimination of these oscillations and their negative effect on the performance of power converters. Good layout practice is mandatory, but there is a limit to the reduction of these parasitics, and often, slowing of the semiconductor switching time must be applied. This article presents a simple methodology for the attenuation of the negative effects of WBG transistor high-frequency oscillations without increasing rise and fall times. The proposed methodology is based on determination of the source of feedback resonant frequency between gate and power loops using network analyzer measurement on printed circuit board and utilization of a tuned $RLC$ filter. Experimental application of the methodology shows a direct relationship between loop resonant frequency and voltage and current oscillations. The proposed method reduces power losses, high-frequency oscillations, and electromagnetic interference.

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