Watermark-strength-aware register binding

Abstract

Watermarking has been recognized as a useful technique for intellectual property (IP) protection. Previous works proposed a low-cost watermarked architecture, which tries to make use of the temporally free output ports to give the watermarking computation results. However, the impact of register binding (in the high-level synthesis stage) on this low-cost watermarked architecture has not been studied. In this paper, we demonstrate that different register binding solutions may lead to different watermark strengths (i.e., different numbers of watermarks). Based on this observation, we propose a watermark-strength-aware register binding approach to maximize the watermark strength under the given constraint on the number of registers. Benchmark data show that, compared with the conventional register binding approach, the proposed approach can greatly increase the watermark strength under the same constraint on the number of registers.