Abstract

The success achieved with implantable neural interfaces has motivated the development of novel architectures of electrode arrays and the improvement of device performance. The Utah electrode array (UEA) is one example of such a device. The unique architecture of the UEA enables single-unit recording with high spatial and temporal resolution. Although the UEA has been commercialized and been used extensively in neuroscience and clinical research, the current processes used to fabricate UEA's impose limitations in the tolerances of the electrode array geometry. Further, existing fabrication costs have led to the need to develop less costly but higher precision batch fabrication processes. This paper presents a wafer-scale fabrication method for the UEA that enables both lower costs and faster production. More importantly, the wafer-scale fabrication significantly improves the quality and tolerances of the electrode array and allow better controllability in the electrode geometry. A comparison between the geometrical and electrical characteristics of the wafer-scale and conventional array-scale processed UEA's is presented.

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