Wafer-level chip-to-Wafer (C2W) integration of high-sensitivity MEMS and ICs

Abstract

A new kind of 3D wafer-level (WL) hybrid integration technology, i.e. Chip-to-Wafer (C2W) approach was developed for high sensitivity Micro-electro-mechanical systems (MEMS) system. The corresponding technical process flows were designed, and corresponding experiments were conducted. Glass frit bonding method was used to bond the MEMS device wafer with silicon coverplate wafer, and the WL hermetic/vacuum seal was fulfilled. Bare dies (e.g. ASIC etc) were stacked on patterned coverplate by chip-to-Wafer approach. Wirebonding method was used for the multilayer I/O interconnection of MEMS and IC. "Dam & Fill" method was used for the capsulation of MEMS system. Finally, 3D-WL hybrid integration of MEMS device wafer and ASIC was realized. The quality factor Q of MEMS device measured after vacuum packaging reached to 577.41, compared to 301.9 of no vacuum packaging. It turned out that glass frit wafer bonding allows hermetic sealing and a high process yield. In order to obtain low-stress microsystem package, simulation was also completed to investigate the stress of MEMS system package, the effects of the thermo-mechanical properties and curing properties of the encapsulating materials on the microsystem package stress were also studied. It turned out that the "dam and fill" approach is an effective way to decrease the stress of the package of high sensitivity MEMS system package.