Wafer Level Atomic Force Probing

Abstract

Abstract The laboratory practice of employing atomic force probing (AFP) using AFP current imaging and Nanoprobe Capacitance-Voltage Spectroscopy (NCVS) at contact level (CA) for identfication of front end of line (FEOL) defects in MOSFET devices, especially for silicon on insulator applications has been extensively detailed [1,2,3]. The introduction of Nanoprobe Capacitance Voltage Spectroscopy (NCVS) on bulk silicon wafers and silicon on insulator (SOI) wafers to characterize discrete MOSFET and SOI embedded dynamic ramdom access memory devices (eDRAM) without the time consuming delayering methods of conventional scanning capacitance microscopy has also been highlighted [1,2,3,4,5,6]. Typically, this laboratory AFP characterization is employed on die fragments sampled from whole wafers following back end of the line (BEOL) metallization processing and test. The process vintage of this hardware can be as much as three months after the critical FEOL processing has occurred. This paper is intended to describe for the first time the methodology of applying AFP on whole 300mm wafers at the post CA chemical-mechanical polishing (CMP) process level to provide a real time insight into yield issues that would not be detected until subsequent BEOL metallization processing and testing. This new AFP tool incorporates enhanced features enabling both DC measurements as well as AC capacitance voltage measurements of discrete deep trench embedded DRAM (eDRAM) devices for 32nm, 28nm, and 20nm node technologies.