Wafer edge defect study of temporary bonded and thin wafers in TSV process flow

Abstract

As 3D-TSV technology based solutions are moving into volume manufacturing, monitoring of the processed device wafer through temporary bonding, thinning, TSV reveal, metallization and de-bonding processes remains a key yield concern. Edge chipping, micro-cracks, device-carrier misalignment, adhesive residue at edge and delamination during device wafer thinning and later process steps are some of the process challenges. Monitoring of device wafer edge for bond process defects and device-carrier concentricity is critical to ramp-up yields and reduce the overall cost of ownership of the TSV process flow. Additionally, to get the highest yield from temporary bonding process, thickness and TTV (total thickness variation) measurements from different layers of the bonded stack as well as detecting bonding voids in one single measurement run is vital. In this contribution, we will discuss the main factors affecting edge yield of temporary bonded and thinned device wafers and demonstrate the use of automated edge inspection and metrology for process control and yield improvement.