Abstract
Self Ionized Plasma (SIP) Ti/TiN Process is used for barrier and glue layer before tungsten deposition in backend-of-the-line (BEOL). Long Throw technology and AC Bias are applied to gain better step coverage. But wafer backside arcing case happened frequently due to AC power side impact during SIP Ti/TiN deposition process. In this paper, the wafer backside arcing mechanism is studied and some effective improvement methods are proposed.
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