VPsec

Abstract

Despite their complexity, general purpose microprocessors are susceptible to fault attacks. The state-of-the-art fault attacks rely on a precise understanding of the microprocessor datapath and the instructions critical path, to identify the exact time and location for injecting data faults that affect only targeted instructions in the pipeline. Software-only mitigations are only partially effective to defend against such attacks, whereas existing hardware-assisted mitigations require substantial changes to the microprocessor design. Both types of mitigation introduce significant overheads to the application memory footprint, the microprocessor area, or impact the overall system performance. We propose a novel hardware-only scheme: Value Prediction for security (VPSec). VPsec leverages value prediction in an embodiment and system design to mitigate fault attacks in general purpose microprocessors. Value prediction is an elegant and hitherto mature microarchitectural performance optimization, which aims to predict the data value ahead of the data production with high prediction accuracy and coverage. VPsec leverages the presence of the state-of-the-art value prediction in a general purpose microprocessors, and re-architects it for security. It augments the original value prediction embodiment with fault detection logic and reaction logic to mitigate fault attacks to both the datapath and the value predictor itself. VPsec defines a new mode of execution in which the predicted value is trusted rather than the produced value. From a design perspective, VPsec requires minimal hardware changes (negligible area impact) with respect to a baseline that supports value prediction, it has no software overheads (no increase in memory footprint), and it retains most of the performance benefits of value prediction. Our evaluation of VPsec demonstrates its efficacy in countering fault attacks as well as its ability to retain the performance benefits of value prediction on cryptographic and non-cryptographic workloads.