Voltage Tuning for Reliable Computation in Emerging Resistive Memories

Abstract

Emerging non-volatile memories facilitate the Computation in Memory (CiM) paradigm. Performing operations with the concept of CiM plays a crucial role in the efficiency improvement of data-intensive applications. Resistive switching RAM (ReRAM) and Spin Transfer Torque Magnetic RAM (STT-MRAM) are promising candidates for the CiM implementation. Reliable CiM implementation with these resistive non-volatile memories (memristive devices) is challenging and error-prone since the manufacturing process of both the memristive components and the CMOS components are susceptible to the temperature- and voltage-dependent variation. Moreover, the small distance between the distinct resistive levels of the STT-MRAM, and time-dependent resistance drift in ReRAM, exacerbates the reliability of CiM implementations. In this paper, we perform a detailed study on the impact of the temperature and voltage biasing on the variation in both the STT-MRAM and ReRAM technologies as well as propose a voltage tuning scheme to significantly improve the sensing reliability of CiM implementations based on these technologies. We also investigate the impact of our proposed voltage tuning scheme on the power consumption and performance of the CiM circuitry.