VLSI implementation of visible watermarking for secure digital still camera design

Abstract

Watermarking is the process that embeds data called a watermark into a multimedia object for its copyright protection. The digital watermarks can be visible to a viewer on careful inspection or completely invisible and cannot be easily recovered without an appropriate decoding mechanism. Digital image watermarking is a computationally intensive task and can be speeded up significantly by implementing in hardware. In this work, we describe a new VLSI architecture for implementing two different visible watermarking schemes for images. The proposed hardware can insert on-the-fly either one or both watermarks into an image depending on the application requirement. The proposed circuit can be integrated into any existing digital still camera framework. First, separate architectures are derived for the two watermarking schemes and then integrated into a unified architecture. A prototype CMOS VLSI chip was designed and verified implementing the proposed architecture and reported in this paper. To our knowledge, this is the first VLSI architecture for implementing visible watermarking schemes.