Abstract
Reviews strategies in implementing DSP systems using residue computations; in particular the authors highlight work underway in the VLSI Research Group, at the University of Windsor, in the area of high throughput DSP systems on silicon. The paper reviews a series of issues including mapping techniques, fault tolerant architectures, and area and power efficient VLSI implementation procedures. CAD tools, developed for automating the design and layout of residue DSP systems on silicon, are also discussed. An extensive bibliography is provided for further reading.
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