Abstract

On-chip sensors, built using reconfigurable logic resources in field programmable gate arrays (FPGAs), have been shown to sense variations in signalpropagation delay, supply voltage and power consumption. These sensors have been successfully used to deploy security attacks called Remote Power Analysis (RPA) Attacks on FPGAs. The sensors proposed thus far consume significant logic resources and some of them could be used to deploy power viruses. In this paper, a sensor (named VITI) occupying a far smaller footprint than existing sensors is presented. VITI is a self-calibrating on-chip sensor design, constructed using adjustable delay elements, flip-flops and LUT elements instead of combinational loops, bulky carry chains or latches. Self-calibration enables VITI the autonomous adaptation to differing situations (such as increased power consumption, temperature changes or placement of the sensor in faraway locations from the circuit under attack). The efficacy of VITI for power consumption measurement was evaluated using Remote Power Analysis (RPA) attacks and results demonstrate recovery of a full 128-bit Advanced Encryption Standard (AES) key with only 20,000 power traces. Experiments demonstrate that VITI consumes 1/4th and 1/16th of the area compared to state-of-the-art sensors such as time to digital converters and ring oscillators for similar effectiveness.

Highlights

  • Reconfigurable logic resources in field programmable gate arrays (FPGAs) can be used to build on-chip sensors that measure variations in signal propagation delays in the FPGA

  • ring oscillators (ROs) being significantly smaller structures are heavily prone to quantization error caused by phase misalignment [GDTL19] and a successful Remote Power Analysis (RPA) attack requires instantiating an array of ROs often resulting in a cumulative area cost that exceeds the area cost of a to digital converters (TDCs)

  • In an RPA attack, the attacker records over time, the variation in signal propagation delay caused by a victim process and subjects the recorded waveforms to a power analysis technique to reveal the secrets computed by the victim

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Summary

Introduction

Reconfigurable logic resources in field programmable gate arrays (FPGAs) can be used to build on-chip sensors that measure variations in signal propagation delays in the FPGA. VITI is compact and free from latches and combinational loops This enables VITI to be deployed in situations where existing sensors cannot be used, such as area-constrained designs or cloud FPGAs. VITI includes a self-calibration module so that a working sensor can be deployed in a greater number of locations (than one without a self-calibration module) on the FPGA. For the first time, an area-efficient on-chip sensor (VITI ) is presented for FPGAs. VITI is constructed using adjustable delay elements, flip-flops and LUT elements instead of using combinational loops, bulky carry chains or latches.

Related Work
Remote Power Analysis Attacks
Threat Model
Key Rank
Adjustable Input Delay Elements
The Proposed VITI Sensor
Abstract Design
Power Variation Measurement
Finite State Machine for Calibration
Mapping VITI on Xilinx FPGAs
Determining n
Experiment Setup
Experiment Setup I
Experiment Setup II
Results and Discussion
IODELAY2 Elements Slices
VITI - Placement
AES Module - Frequency
Other Design Parameters
Noise Tolerance
Portability
Deployment on Cloud FPGAs
Improvements to Resilience
Conclusion
Full Text
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