VHDL Design and Synthesis of 64 bit RISC Processor System on Chip (SoC)

Abstract

The paper presents the design and synthesis of 64 bit Reduced Instruction Set Computer (RISC) on Spartan-3E FPGA. A computer using few instructions with simple constructs so they can be executed at much faster rate within the CPU without having to use the memory very often. This type of computer is classified as a reduced instruction set of computer is called RISC. One advantage of RISC is that they can execute their instructions very fast because the instructions are so simple. Another more important advantage is that RISC chips require fewer transistors, makes them cheaper to design and produce. The system on chip (SOC) design of 64 bit RISC processor consist of ALU, Shifter, comparator, RAM Memory, Control Unit, Program counter. Top design approach is used to configure the design. The design is synthesized on Spartan -3E FPGA for 33 instructions. VHDL programming language is used to develop the RISC in Xilinx 14.2 ISE design suit and functional simulated on Modelsim 10.1 b software.