Abstract
A simple CMOS on-chip differential buffer is presented. From simulations based on a 2 μm n-well CMOS process, this buffer can give a 260 MHz cutoff frequency with a load of 50 kΩ paralleled by 1 pF. THD at 1 MHz for 1 V peak to peak is as low as 0.003%. Offset voltage is only a few millivolts even if considering mismatch among the transistors. The circuit is very useful as a high-speed internal node buffer or test/pin drive buffer. The power supply can be as low as ±2.5 V.
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