Abstract
A Transient safe operating area (TSOA) definition for ESD applications is introduced. Within this concept framework, ESD protection device topologies developed in a mixed-signal submicron high-voltage CMOS technology are studied to identify turn-on voltage and the resulting voltage overshoot conditions during fast ESD transients. A state-of-the-art numerical simulation environment used to study and optimize the fast transient response of ESD protection devices is discussed and simulation results are benchmarked versus very fast transmission line pulsing measurements. Constraints for triggering control of clamp devices are also investigated via simulations and pulse measurements.
Published Version
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