Abstract
We propose a vertical integrated-gate CMOS (VIG CMOS) technology which integrates multi-gate PMOS and NMOS together to significantly increase the transistor density for ultra-dense IC applications. A device model for the electric characteristics of ultra-thin double-gate and vertical surrounding-gate MOSFETs is developed and analytical solutions to the simplified nonlinear Poisson’s equation with different boundary conditions are found. We discuss the involved physics in each mathematical solution and determine its applicable cases. The concentration of the induced inversion charge in the cylindrical Si body of a surrounding-gate MOSFET is found higher than that of a double-gate MOSFET. We also show that the control of a cylindrical inner Si body by the surrounding-gate is stronger than its control of an outer Si body shell.
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